L99PM62XP datasheet(34/98 Pages) STMICROELECTRONICS

34 / 98 page

Description

L99PM62XP

34/98

Doc ID 16363 Rev 4

pulses are counted within one frame the complete frame is ignored. This safety function is

implemented to avoid an activation of the output stages by a wrong communication frame.

Note:

Due to this safety functionality a daisy chaining of SPI is not possible. Instead, a parallel

operation of the SPI bus by controlling the CSN signal of the connected IC's is

recommended.

Serial data out (DO)

The data output driver is activated by a logical low level at the CSN input and goes from high

impedance to a low or high level depending on the global error flag (fault condition). The first

rising edge of the CLK input after a high to low transition of the CSN pin transfers the

content of the selected status register into the data out shift register. Each subsequent

falling edge of the CLK shifts the next bit out.

Serial clock (CLK)

The CLK input is used to synchronize the input and output serial bit streams. The data input

(DI) is sampled at the rising edge of the CLK and the data output (DO) changes with the

falling edge of the CLK signal. The SPI can be driven with a CLK Frequency up to 1MHz.

L99PM62XP Datasheet(PDF) 34 Page - STMicroelectronics