PC7410 datasheet(47/57 Pages) ETC2

47 / 57 page

0832F–HIREL–02/07

e2v semiconductors SAS 2007

PC7410

P and RN are designed to be close to each other in value. Then, Z0 = (RP + RN)/2. Figure 14-5 describes

the alternate driver impedance measurement circuit.

Figure 14-5. Alternate Driver Impedance Measurement Circuit

Table 14-1 summarizes the signal impedance results. The driver impedance values were characterized

at 0°, 65°, and 105°C. The impedance increases with junction temperature and is relatively unaffected by

bus voltage.

14.6

Pull-up Resistor Requirements

The PC7410 requires pull-up resistors (1 k

Ω – 5 kΩ) on several control pins of the bus interface to main-

tain the control signals in the negated state after they have been actively negated and released by the

PC7410 or other bus masters. These pins are: TS, ARTRY, SHDO, SHD1.

Four test pins also require pull-up resistors (100

Ω – 1 kΩ). These pins are CHK, L1_TSTCLK,

L2_TSTCLK, and LSSD_MODE. These signals are for factory use only and must be pulled up to OV

for normal machine operation.

If pull-down resistors are used to configure BVSEL or L2VSEL, the resistors should be less than 250

Ω.

(see Table 12-1 on page 33). Because PLL_CFG[0:3] must remain stable during normal operation,

strong pull-up and pull-down resistors (1 k

Ω or less) are recommended to configure these signals in

order to protect against erroneous switching due to ground bounce, power supply noise or noise

coupling.

In addition, CKSTP_OUT is an open-drain style output that requires a pull-up resistor (1 k

Ω–5 kΩ) if it is

used by the system. The CKSTP_IN signal should likewise be pulled up through a pull-up resistor (1 k

Ω–

5 k

Ω) to prevent erroneous assertions of this signal.

Table 14-1.

Impedance Characteristics with V

DD = 1.8V, OVDD = 2.5V, TJ = 0° C - 105° C

Impedance

Processor bus

L2 Bus

Symbol

Unit

41.5 – 54.3

42.7 – 54.1

Ω

37.3 – 55.3

39.3 – 50

Ω

(L2)OVDD

BGA

Data

Vforce

OGND

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