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R5F2L3ACBNFP Datasheet(PDF) 101 Page - Renesas Technology Corp

Part # R5F2L3ACBNFP
Description  RENESAS MCU R8C FAMILY / R8C/Lx SERIES
PDF  848 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F2L3ACBNFP Datasheet(HTML) 101 Page - Renesas Technology Corp

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6. Voltage Detection Circuit
REJ09B0441-0010 Rev.0.10
Jul 30, 2008
Page 65 of 809
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
6.2.2
Voltage Monitor Circuit Edge Select Register (VCAC)
Notes:
1. When the VCA1 bit is set to 0 (one edge), the VW1C7 bit in the VW1C register is enabled. Set the VW1C7 bit
after setting the VCAC1 bit to 0.
2. When the VCA2 bit is set to 0 (one edge), the VW2C7 bit in the VW2C register is enabled. Set the VW2C7 bit
after setting the VCAC2 bit to 0.
6.2.3
Voltage Detect Register (VCA1)
Note:
1. When the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit enabled), the VCA13 bit is
enabled.
When the VCA27 bit in the VCA2 register is set to 0 (voltage detection 2 circuit disabled), the VCA13 bit is set to
1 (VCC
≥ Vdet2).
Address 0031h
Bit
b7b6b5
b4b3b2
b1b0
Symbol
—
—
—
—
—
VCAC2
VCAC1
—
After Reset
000
000
00
Bit
Symbol
Bit Name
Function
R/W
b0
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b1
VCAC1
Voltage monitor 1 circuit edge select bit (1) 0: One edge
1: Both edges
R/W
b2
VCAC2
Voltage monitor 2 circuit edge select bit (2) 0: One edge
1: Both edges
R/W
b3
—
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
—
b4
—
b5
—
b6
—
b7
—
Address 0033h
Bit
b7b6b5
b4b3b2
b1b0
Symbol
——
——
VCA13
———
After Reset
000
010
00
Bit
Symbol
Bit Name
Function
R/W
b0
—
Reserved bits
Set to 0.
R/W
b1
—
b2
—
b3
VCA13
Voltage detection 2 signal monitor flag (1) 0: VCC < Vdet2
1: VCC
≥ Vdet2
or voltage detection 2 circuit disabled
R
b4
—
Reserved bits
Set to 0.
R/W
b5
—
b6
—
b7
—



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