ACS8526P datasheet(4/74 Pages) SEMTECH

4 / 74 page

ADVANCED COMMUNICATIONS

FINAL

DATASHEET

Revision 4.01/June 2006 © Semtech Corp.

Page 4

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ACS8526 LC/P LITE

Note...I = Input, O = Output, P = Power, TTLU = TTL input with pull-up resistor, TTLD = TTL input with pull-down resistor.

Pin Description

Table 1 Power Pins

Pin Number

Symbol

I/O

Type

Description

8, 9,

VD1+, VD2+,

VD3+

Supply Voltage: Digital supply to gates in analog section, +3.3 Volts ±10%.

VDD_DIFF

Supply Voltage: Digital supply for differential output pins 19 and 20, +3.3 Volts

±10%.

VDD5V

Digital Supply for +5 Volts tolerance to input pins. Connect to +5 Volts (±10%) for

clamping to +5 Volts. Connect to VDD for clamping to +3.3 Volts. Leave floating

for no clamping, input pins tolerant up to +5.5 Volts.

32, 39,

VDD1, VDD2,

VDD3,

Supply Voltage: Digital supply to logic, +3.3 Volts ±10%.

VA1+

Supply Voltage: Analog supply to clock multiplying PLL, +3.3 Volts ±10%.

14, 57

VA2+, VA3+

Supply Voltage: Analog supply to output PLLs APLL2 and APLL1, +3.3 Volts

±10%.

15, 58

AGND3, AGND4

Supply Ground: Analog ground for output PLLs APLL2 and APLL1.

7, 10,

DGND1, DGND2,

DGND3

Supply Ground: Digital ground for components in PLLs.

31, 40,

DGND4, DGND5,

DGND6

Supply Ground: Digital ground for logic.

GND_DIFF

Supply Ground: Digital ground for differential output pins 19 and 20.

1, 3

AGND1, AGND2

Supply Ground: Analog grounds.

Table 2 Internally Connected

Pin Number

Symbol

I/O

Type

Description

2, 16, 23, 24,

25, 26, 60,

61, 62

IC1, IC2, IC3, IC4,

IC5, IC6, IC7,

IC8 IC9

Internally Connected: Leave to float.

55, 59

NC1, NC2

Not Connected: Leave to float.

Table 3 Other Pins

Pin Number

Symbol

I/O

Type

Description

LOS_ALARM

TTL/CMOS

LOS_Alarm: Flag to indicate loss of activity of currently selected reference

source.

REFCLK

TTL

Reference Clock: 12.800 MHz (refer to section headed Local Oscillator Clock).

SRCSW

TTLD

Source Switching: Controls switchover between SEC1 and SEC2 inputs as the

selected reference. SRCSW must be held High on power-up or reset, and for a

further 251 ms after PORB has gone High. See “Initialization” on page 8.

FrSync

TTL/CMOS

Output Reference: 8 kHz Frame Sync output.

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