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MB91F613 Datasheet(PDF) 88 Page - fujitsu semiconductor |
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MB91F613 Datasheet(HTML) 88 Page - fujitsu semiconductor |
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88 / 104 page  MB91610 Series 88 DS07-16907-2E (13) Display signal timing (VCC = AVCC = 3.0 V to 3.6 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C) *1 : Input continuous signal to the dot clock. *2 : Output load 16 pF Note: Actual display output varies depending on what is controlled, such as display output control and display location control in each display layer. Parameter Symbol Pin name Value Unit Remarks Min Max Dot clock input cycle time tDIF DCKI 8 75 MHz *1 Dot clock input pulse width tDIWH DCKI 5 ⎯ ns *1 tDIWL 5 ⎯ ns Dot clock output delay time1 tPDCS DCKO 2.2 8 ns *2 Display signal output delay time I1 tPDI1 R0 to R4, G0 to G5, B0 to B4, VOB, VOA0 to VOA2 28.3 ns *2 Display signal output delay time O1 tPDO1 −4 +5ns *2 DCKI DCKO R0 to R4 G0 to G5 B0 to B4 VOB VOA0 to VOA2 tPDCS tDIF tDIWH tDIWL tPDO1 tPDI1 tPDCS 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC • Display signal output timing |
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