Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

PCIMX515CJM6C Datasheet(PDF) 59 Page - Freescale Semiconductor, Inc

Part # PCIMX515CJM6C
Description  i.MX51 Applications Processors for Consumer and Industrial Products
PDF  184 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PCIMX515CJM6C Datasheet(HTML) 59 Page - Freescale Semiconductor, Inc

Back Button PCIMX515CJM6C Datasheet HTML 55Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 56Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 57Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 58Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 59Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 60Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 61Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 62Page - Freescale Semiconductor, Inc PCIMX515CJM6C Datasheet HTML 63Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 59 / 184 page
background image
Electrical Characteristics
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1
Freescale Semiconductor
59
Preliminary—Subject to Change Without Notice
Table 48. Derating values for DDR2 Differential DQS1,2
Table 49. Derating values for DDR2 Single Ended DQS3,4
1. Test conditions are: Capacitance 15 pF for DDR PADS. Recommended drive strengths is medium for SDCLK and high for
address and controls.
2. SDRAM CLK and DQS related parameters are being measured from the 50% point. that is, high is defined as 50% of signal
value and low is defined as 50% as signal value. DDR SDRAM CLK parameters are measured at the crossing point of SDCLK
and SDCLK (inverted clock).
3. Test conditions are: Capacitance 15 pF for DDR PADS. Recommended drive strengths is medium for SDCLK and high for
address and controls.
4. SDRAM CLK and DQS related parameters are being measured from the 50% point. that is, high is defined as 50% of signal
value and low is defined as 50% as signal value. DDR SDRAM CLK parameters are measured at the crossing point of SDCLK
and SDCLK (inverted clock).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com