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PCIMX515CJM6C Datasheet(PDF) 76 Page - Freescale Semiconductor, Inc |
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PCIMX515CJM6C Datasheet(HTML) 76 Page - Freescale Semiconductor, Inc |
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76 / 184 page  i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1 76 Freescale Semiconductor Preliminary—Subject to Change Without Notice Electrical Characteristics Table 66. Video Signal Cross-Reference i.MX51 LCD Comment1 Port Name (x=1,2) RGB, Signal Name (General) RGB/TV Signal Allocation (Example) Smart 16-bit RGB 18-bit RGB 24 Bit RGB 8-bit YCrCb2 16-bit YCrCb 20-bit YCrCb Signal Name DISPx_DAT0 DAT[0] B[0] B[0] B[0] Y/C[0] C[0] C[0] DAT[0] The restrictions are as follows: a) There are maximal three continuous groups of bits that could be independently mapped to the external bus. Groups should not be overlapped. b) The bit order is expressed in each of the bit groups, for example B[0] = least significant blue pixel bit DISPx_DAT1 DAT[1] B[1] B[1] B[1] Y/C[1] C[1] C[1] DAT[1] DISPx_DAT2 DAT[2] B[2] B[2] B[2] Y/C[2] C[2] C[2] DAT[2] DISPx_DAT3 DAT[3] B[3] B[3] B[3] Y/C[3] C[3] C[3] DAT[3] DISPx_DAT4 DAT[4] B[4] B[4] B[4] Y/C[4] C[4] C[4] DAT[4] DISPx_DAT5 DAT[5] G[0] B[5] B[5] Y/C[5] C[5] C[5] DAT[5] DISPx_DAT6 DAT[6] G[1] G[0] B[6] Y/C[6] C[6] C[6] DAT[6] DISPx_DAT7 DAT[7] G[2] G[1] B[7] Y/C[7] C[7] C[7] DAT[7] DISPx_DAT8 DAT[8] G[3] G[2] G[0] — Y[0] C[8] DAT[8] DISPx_DAT9 DAT[9] G[4] G[3] G[1] — Y[1] C[9] DAT[9] DISPx_DAT10 DAT[10] G[5] G[4] G[2] — Y[2] Y[0] DAT[10] DISPx_DAT11 DAT[11] R[0] G[5] G[3] — Y[3] Y[1] DAT[11] DISPx_DAT12 DAT[12] R[1] R[0] G[4] — Y[4] Y[2] DAT[12] DISPx_DAT13 DAT[13] R[2] R[1] G[5] — Y[5] Y[3] DAT[13] DISPx_DAT14 DAT[14] R[3] R[2] G[6] — Y[6] Y[4] DAT[14] DISPx_DAT15 DAT[15] R[4] R[3] G[7] — Y[7] Y[5] DAT[15] DISPx_DAT16 DAT[16] — R[4] R[0] — — Y[6] — DISPx_DAT17 DAT[17] — R[5] R[1] — — Y[7] — DISPx_DAT18 DAT[18] — — R[2] — — Y[8] — DISPx_DAT19 DAT[19] — — R[3] — — Y[9] — DISPx_DAT20 DAT[20] — — R[4] — — — — DISPx_DAT21 DAT[21] — — R[5] — — — — |
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