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PCIMX515CJM6C Datasheet(PDF) 14 Page - Freescale Semiconductor, Inc

Part # PCIMX515CJM6C
Description  i.MX51 Applications Processors for Consumer and Industrial Products
PDF  184 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PCIMX515CJM6C Datasheet(HTML) 14 Page - Freescale Semiconductor, Inc

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i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1
14
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
Electrical Characteristics
3
Electrical Characteristics
This section provides the device and module-level electrical characteristics for the i.MX51 processor.
3.1
Chip-Level Conditions
This section provides the device-level electrical characteristics for the IC. See Table 5 for a quick reference
to the individual tables and sections.
VREG
This regulator is no longer used and should be floated by the user.
XTAL/EXTAL
The user should tie a fundamental-mode crystal across XTAL and EXTAL. The crystal must be
rated for a maximum drive level of 100
μW or higher. An ESR (equivalent series resistance) of
80
Ω or less is recommended. Freescale BSP (Board Support Package) software requires 24 MHz
on EXTAL.
The crystal can be eliminated if an external 24 MHz oscillator is available. In this case, EXTAL must
be directly driven by the external oscillator and XTAL is floated. The EXTAL signal level must swing
from NVCC_OSC to GND. If the clock is used for USB, then there are strict jitter requirements: <
50 ps peak-to-peak below 1.2 MHz and < 100 ps peak-to-peak above 1.2 MHz for the USB PHY.
The COSC_EN bit in the CCM (Clock Control Module) must be cleared to put the on-chip oscillator
circuit in bypass mode which allows EXTAL to be externally driven. COSC_EN is bit 12 in the CCR
register of the CCM.
Table 4. JTAG Controller Interface Summary
JTAG
I/O Type
On-chip Termination
JTAG_TCK
Input
100 k
Ω pull-down
JTAG_TMS
Input
47 k
Ω pull-up
JTAG_TDI
Input
47 k
Ω pull-up
JTAG_TDO
3-state output
Keeper
JTAG_TRSTB
Input
47 k
Ω pull-up
JTAG_DE_B
Input/open-drain output
47 k
Ω pull-up
JTAG_MOD
Input
100 k
Ω pull-down
Table 5. i.MX51 Chip-Level Conditions
For these characteristics, …
Topic appears …
Table 6, “Absolute Maximum Ratings”
on page 15
Table 7, “Thermal Resistance Data”
on page 15
Table 8, “i.MX51 Operating Ranges”
on page 16
Table 9, “Interface Frequency”
on page 18
Table 3. Special Signal Considerations (continued)
Signal Name
Remarks



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