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AT90SCR100 Datasheet(PDF) 131 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 131 Page - ATMEL Corporation |
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131 / 433 page  131 TPR0327AY–SMS–30Jan09 AT90SCR100 13.2.10.5 OCR1AH and OCR1AL – Output Compare Register 1 A 13.2.10.6 OCR1BH and OCR1BL – Output Compare Register 1 B The Output Compare Registers contain a 16-bit value that is continuously compared with the counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to generate a waveform output on the OC1x pin. The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are written simultaneously when the CPU writes to these registers, the access is performed using an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit Registers” on page 107. 13.2.10.7 ICR1H and ICR1L – Input Capture Register 1 The Input Capture is updated with the counter (TCNT1) value each time an event occurs on the ICP1 pin. The Input Capture can be used for defining the counter TOP value. The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read simultaneously when the CPU accesses these registers, the access is performed using an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit Registers” on page 107. Bit 15 141312 11 10 9 8 $000089 OCR1A[15..8] OCR1AH $000088 OCR1A [7..0] OCR1AL Bit 7 6543 2 1 0 Read/write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial value 0 0 0 0 0 0 0 0 0x00 0 0000 0 0 0 0x00 Bit 15 141312 11 10 9 8 $00008B OCR1B[15..8] OCR1BH $00008A OCR1B [7..0] OCR1BL Bit 7 6543 2 1 0 Read/write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial value 0 0 0 0 0 0 0 0 0x00 0 0000 0 0 0 0x00 Bit 15 141312 11 10 9 8 $000087 ICR1[15..8] ICR1H $000086 ICR1 [7..0] ICR1L Bit 7 6543 2 1 0 Read/write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial value 0 0 0 0 0 0 0 0 0x00 0 0000 0 0 0 0x00 |
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