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AT90SCR100 Datasheet(PDF) 134 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 134 Page - ATMEL Corporation |
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134 / 433 page  134 TPR0327AY–SMS–30Jan09 AT90SCR100 13.3 8-bit Timer/Counter2 with PWM and Asynchronous Operation (RTC) Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The main features are: • Single Channel Counter • Clear Timer on Compare Match (Auto Reload) • Glitch-free, Phase Correct Pulse Width Modulator (PWM) • Frequency Generator • 10-bit Clock Prescaler • Overflow and Compare Match Interrupt Sources (TOV2, OCF2A and OCF2B) • Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock 13.3.1 Overview A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 13-23. For the actual placement of I/O pins, see “Pin List Configuration” on page 5. CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca- tions are listed in the “8-bit Timer/Counter Register Description” on page 145. The Power Reduction Timer/Counter2 bit, PRTIM2, in “PRR0 – Power Reduction Register 0” on page 45 must be written to zero to enable Timer/Counter2 module. Figure 13-25. 8-bit Timer/Counter Block Diagram Timer/Counter OCR2A OCR2B = = TCNT2 Waveform Generation Waveform Generation OC2A OC2B = Fixed TOP Value Control Logic = 0 TOP BOTTOM Count Clear Direction TOV2 (Int.Req.) OC2A (Int.Req.) OC2B (Int.Req.) TCCR2A TCCR2B clk Tn ASSR Synchronization Unit Prescaler T/C Oscillator clk I/O clk ASY asynchronous mode select (AS2) Synchronized Status flags TOSC1 TOSC2 Status flags clk I/O |
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