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AT90SCR100 Datasheet(PDF) 149 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 149 Page - ATMEL Corporation |
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149 / 433 page ![]() 149 TPR0327AY–SMS–30Jan09 AT90SCR100 However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2B bit, an immediate Compare Match is forced on the Waveform Generation unit. The OC2B output is changed according to its COM2B1:0 bits setting. Note that the FOC2B bit is implemented as a strobe. Therefore it is the value present in the COM2B1:0 bits that determines the effect of the forced compare. A FOC2B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR2B as TOP. The FOC2B bit is always read as zero. • Bits 5..4 – Res: Reserved Bits These bits are reserved bits and will always read as zero. • Bit 3 – WGM22: Waveform Generation Mode See the description in the “TCCR2A – Timer/Counter Control Register A” on page 145. • Bit 2..0 – CS22..0: Clock Select The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table 13-24. If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the counter even if the pin is configured as an output. This feature allows software control of the counting. 13.3.8.3 TCNT2 – Timer/Counter Register The Timer/Counter Register gives direct access, both for read and write operations, to the Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running, introduces a risk of missing a Compare Match between TCNT2 and the OCR2x Registers. Table 13-24. Clock Select Bit Description CS22 CS21 CS20 Description 0 0 0 No clock source (Timer/Counter stopped). 001 clkT2S/(No prescaling) 010 clkT2S/8 (From prescaler) 011 clkT2S/32 (From prescaler) 100 clkT2S/64 (From prescaler) 101 clkT2S/128 (From prescaler) 110 clkT2S/256 (From prescaler) 111 clkT2S/1024 (From prescaler) Bit 7 6 5 4 3 2 1 0 $0000B2 TCNT2 [7..0] TCNT2 Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 0 0 0 0 0 0 0 0 0x00 |
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