AT90SCR100 datasheet(220/433 Pages) ATMEL

220 / 433 page

220

TPR0327AY–SMS–30Jan09

AT90SCR100

17.7.4

UHIEN - USB Host Interrupt ENable Register

• Bit 7 - Res : Reserved Bit

This bit is reserved for future use. The value read from these bits is always 0. Do not set these

bits.

• Bit 6 - HWUPE : Host Wake-Up Interrupt Enable

Set this bit to enable HWUP interrupt.

Clear this bit to disable HWUP interrupt.

• Bit 5 - HSOFE : Host Start Of frame Interrupt Enable

Set this bit to enable HSOF interrupt.

Clear this bit to disable HSOF interrupt.

• Bit 4 - RXRSME : Upstream Resume Received Interrupt Enable

Set this bit to enable the RXRSMI interrupt.

Clear this bit to disable the RXRSMI interrupt.

• Bit 3 - RSMEDE : Downstream Resume Sent Interrupt Enable

Set this bit to enable the RSMEDI interrupt.

Clear this bit to disable the RSMEDI interrupt.

• Bit 2 - RSTE : USB Reset Sent Interrupt Enable

Set this bit to enable the RSTI interrupt.

Clear this bit to disable the RSTI interrupt.

• Bit 1 - DDISCE : Device Disconnection Interrupt Enable

Set this bit to enable the DDISCI interrupt.

Clear this bit to disable the DDISCI interrupt.

After having detected a disconnection, please reset the USB Host. See “Device Detection” on

page 210.

• Bit 0 - DCONNE : Device Connection Interrupt Enable

Set this bit to enable the DCONNI interrupt.

Clear this bit to disable the DCONNI interrupt.

Bit

$00A0

HWUPE

HSOFE

RXRSME RSMEDE

RSTE

DDISCE

DCONNE

UHIEN

Read/write

R/W

Initial value

0x00

AT90SCR100 Datasheet(PDF) 220 Page - ATMEL Corporation

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