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H5GQ1H24AFR-R0C Datasheet(PDF) 34 Page - Hynix Semiconductor

Part # H5GQ1H24AFR-R0C
Description  1Gb (32Mx32) GDDR5 SGRAM
PDF  173 Pages
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5GQ1H24AFR-R0C Datasheet(HTML) 34 Page - Hynix Semiconductor

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This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsability for use of circuits described. No patent licenses are implied.
Rev. 1.0 /Nov. 2009
34
H5GQ1H24AFR
LDFF loads the DBI FIFO regardless of the WDBI and RDBI Mode Register bits. It also loads the EDC FIFO 
regardless of the WRCRC and RDCRC Mode Register bits, and no CRC is calculated; however, RDBI and 
RDCRC must be enabled to read the DBI and EDC bits, respectively, with the RDTR command.
Figure 17: LDFF Command
CS#
WE#
CAS#
RAS#
CKE#
LOW
LDFF
CK
CK#
A9, BA3
A1, A3
A8,A10,A11
BA0‐BA2
A2, A4,A5
0,0,1
A0,A7,A6
DATA
DATA
DATA
DATA
DATA = FIFO data
BP
BP = Burst Position



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