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PIC16F1933-E/P Datasheet(PDF) 193 Page - Microchip Technology |
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PIC16F1933-E/P Datasheet(HTML) 193 Page - Microchip Technology |
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193 / 418 page ![]() © 2008 Microchip Technology Inc. Preliminary DS41364A-page 191 PIC16F193X/LF193X 19.5 PWM Mode The PWM mode generates a Pulse-Width Modulated signal on the CCPx pin. The duty cycle, period and resolution are determined by the following registers: •PRx •TxCON • CCPRxL • CCPxCON The ECCP modules have the following additional registers: • ECCPxAS • PSTRxCON •PWMxCON In Pulse-Width Modulation (PWM) mode, the CCPx module produces up to a 10-bit resolution PWM output on the CCPx pin. Since the CCPx pin is multiplexed with the PORT data latch, the TRIS for that pin must be cleared to enable the CCPx pin output driver. The CCPx module in PWM mode can have the PWM based off of either Timer2, Timer4 or TImer6. This is controlled by the CCPTMRS0 and CCPTMRS1 registers. Reference Section 19.2 “CCP Clock Selection” for more information. Figure 19-3 shows a simplified block diagram of PWM operation. Figure 19-4 shows a typical waveform of the PWM signal. For a step-by-step procedure on how to set up the CCP module for PWM operation, see Section 19.5.7 “Setup for PWM Operation”. FIGURE 19-3: SIMPLIFIED PWM BLOCK DIAGRAM The PWM output (Figure 19-4) has a time base (period) and a time that the output stays high (duty cycle). FIGURE 19-4: CCP PWM OUTPUT Note: Clearing the CCPxCON register will relinquish CCPx control of the CCPx pin. CCPRxL CCPRxH(2) (Slave) Comparator TMRx PRx (1) RQ S Duty Cycle Registers CCPxCON<5:4> Clear Timerx, toggle CCPx pin and latch duty cycle Note 1: The 8-bit timer TMR2 register is concatenated with the 2-bit internal system clock (FOSC), or 2 bits of the prescaler, to create the 10-bit time base. 2: In PWM mode, CCPRxH is a read-only register. TRIS CCPx Comparator Period Pulse Width TMRX = 0 TMRx\2 = CCPRxH:CCPxCON<5:4> TMRx = PRx |
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