SPMCK16Z4MPV20 datasheet(494/500 Pages) FREESCALE

494 / 500 page

M68HC16 Z SERIES

I-12

USER’S MANUAL

processing summary 5-57

states of pins assigned to other MCU modules 5-54

status register (RSR) 5-24, 5-57

timing 5-55

Resistor-divider chain 8-5

Resolution 8-7

Result registers 8-13

Return-from-interrupt instruction (RTI) 4-40

RF 8-22

RF energy 8-14

RIE D-42, D-61

RJURR D-36

RLCK 6-2, D-23

RMAC 4-9

ROM array space (ASPC) D-26

ROMBAH/BAL 7-1, D-27

ROMBS 7-1

ROMBS0-3 D-28

RR D-51

RS-232C terminal C-2

RSIGHI/LO 7-1, 7-3, D-27

RSR 5-24, D-8

RT 9-28, 10-21

RTI 4-40

RWU 9-30, 10-22, D-42, D-62

RXD (QSM) 9-25

RXDA/B (MCCI) 10-16, 10-17

–S–

S 4-4, D-3

S8CM D-32

Sample

capacitor 8-5

time 8-7

time selection (STS) field D-31

SAR 8-13

Saturate mode (SM) bit 4-4, D-3

SBK 9-27, 10-20, D-42, D-62

SCAN D-32

Scan mode selection (SCAN) D-32

SCBR D-40, D-59

SCCR 9-24

SCCR0 D-40

SCCR0A/B 10-13, D-59

SCCR1 D-41

SCCR1A/B 10-16, D-60

SCDR 9-24, D-44

SCDRA/B 10-16, D-63

SCF D-36

SCI 9-1, 9-2, 9-16, 9-21, 10-1

baud

clock 9-26, 10-18

rate 10-18, D-40, D-59

idle-line detection 9-29, 10-21

internal loop 9-30, 10-22

interrupt level (ILSCIA/B) D-55

operation 9-25, 10-17

parity checking 9-26, 10-19

pins (MCCI) 10-16

pins (QSM) 9-25

receiver

block diagram

MCCI 10-15

QSM 9-23

operation 9-28, 10-20

wakeup 9-29, 10-22

registers 9-24

control register 0 — MCCI (SCCR0A/B) 10-13,

D-59

control register 1 — MCCI (SCCR1A/B) 10-16,

D-60

control registers — QSM (SCCR) 9-24

data register

MCCI (SCDRA/B) 10-16, D-63

QSM (SCDR) 9-24

status register

MCCI (SCSRA/B) 10-16, D-62

QSM (SCSR) 9-24

serial formats 10-18

transmitter

block diagram

MCCI 10-14

QSM 9-22

operation 9-27

SCIA/B 10-2

SCK 9-16, 9-20

actual delay before SCK (equation) 9-17

baud rate (equation) 9-17

SCSR 9-24, D-43

SCSRA/B 10-16, D-62

Select eight-conversion sequence mode (S8CM) D-32

Send break (SBK) 9-27, 10-20, D-42, D-62

Separate program and data space map

MC68HC16Z1/CKZ1/CMZ1 3-23

MC68HC16Z2/Z3 3-24

MC68HC16Z4/CKZ4 3-25

Sequence complete flag (SCF) D-36

Serial

clock

baud rate (SPBR) D-48

frequency range 4-44

communication interface (SCI) 9-1, 9-21, 10-1, 10-13

data word 4-44

formats 9-25, 10-18

interface clock signal (DSCLK) 4-44

mode (M) bit 9-25, 10-18

peripheral interface (SPI) 10-1, 10-4

shifter 9-24, 9-27, 10-19

Set (definition) 2-6

Settling time 8-22

SFA 11-18, D-75

SFB 11-18, D-75

SHEN 5-47, D-6

Show cycle

enable (SHEN) 5-3, 5-47, D-6

operation 5-47

timing diagram A-35

Signal characteristics 3-13

Signature registers (RSIGHI/LO) 7-1

Freescale Semiconductor, Inc.

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