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82G33 Datasheet(PDF) 96 Page - Intel Corporation |
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82G33 Datasheet(HTML) 96 Page - Intel Corporation |
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96 / 437 page ![]() DRAM Controller Registers (D0:F0) 96 Datasheet Bit Access & Default Description 7:4 RW/L 0011b Graphics Mode Select (GMS): This field is used to select the amount of Main Memory that is pre-allocated to support the Internal Graphics device in VGA (non-linear) and Native (linear) modes. The BIOS ensures that memory is pre-allocated only when Internal graphics is enabled. 0000 = No memory pre-allocated. Device 2 (IGD) does not claim VGA cycles (Memory and I/O), and the Sub-Class Code field within Device 2 function 0 Class Code register is 80h. 0001 = DVMT (UMA) mode, 1 MB of memory pre-allocated for frame buffer. 0010 = DVMT (UMA) mode, 4 MB of memory pre-allocated for frame buffer. 0011 = DVMT (UMA) mode, 8 MB of memory pre-allocated for frame buffer. 0100 = DVMT (UMA) mode, 16 MB of memory pre-allocated for frame buffer. 0101 = DVMT (UMA) mode, 32 MB of memory pre-allocated for frame buffer. 0110 = DVMT (UMA) mode, 48 MB of memory pre-allocated for frame buffer. 0111 = DVMT (UMA) mode, 64 MB of memory pre-allocated for frame buffer. 1000 = DVMT (UMA) mode, 128 MB of memory pre-allocated for frame buffer. 1001 = DVMT (UMA) mode, 256 MB of memory pre-allocated for frame buffer. Note: This register is locked and becomes Read Only when the D_LCK bit in the SMRAM register is set. BIOS Requirement: BIOS must not set this field to 000 if IVD (bit 1 of this register) is 0. 3:2 RO 00b Reserved 1 RW/L 0b IGD VGA Disable (IVD): 0 = Enable. Device 2 (IGD) claims VGA memory and I/O cycles, the Sub-Class Code within Device 2 Class Code register is 00h. 1 =Disable. Device 2 (IGD) does not claim VGA cycles (Memory and I/O), and the Sub-Class Code field within Device 2 function 0 Class Code register is 80h. BIOS Requirement: BIOS must not set this bit to 0 if the GMS field (bits 6:4 of this register) pre-allocates no memory. This bit MUST be set to 1 if Device 2 is disabled either via a fuse or fuse override (CAPID0[46] = 1) or via a register (DEVEN[3] = 0). This register is locked by Intel® TXT or ME stolen Memory lock. 0 RO 0b Reserved |
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