82G33 datasheet(19/437 Pages) INTEL

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Introduction

Datasheet

Introduction

The Intel® 3 Series Chipsets are designed for use with the Intel® Core™2 Duo desktop

processor and Intel® Core™2 Quad processor based platforms. Each chipset contains

two components: GMCH (or MCH) for the host bridge and I/O Controller Hub 9 (ICH9)

for the I/O subsystem. The 82Q33 GMCH is part of the Intel® Q35 Express chipset.

The 82Q33 GMCH is part of the Intel® Q33 Express chipset. The 82G33 GMCH is part

of the Intel® G33 Express chipset. The 82P35 MCH is part of the Intel® P35 Express

chipset. The ICH9 is the ninth generation I/O Controller Hub and provides a multitude

of I/O related functions. The following figures show example system block diagrams

for the Intel® Q35, Q33, G33 and P35 Express chipsets.

This document is the datasheet for the Intel® 82Q35, 82Q33, and 82G33 Graphics and

Memory Controller Hub (GMCH) and Intel® 82P35 Memory Controller Hub (MCH).

Topics covered include; signal description, system memory map, PCI register

description, a description of the (G)MCH interfaces and major functional units,

electrical characteristics, ballout definitions, and package characteristics.

The primary difference between the Intel® 82Q35, 82Q33, 82G33 GMCH and 82P35

MCH is that the 82Q35 GMCH, 82Q33 GMCH, and 82G33 GMCH have an integrated

graphics device (IGD) plus the associated display interfaces. The 82P35 does not

contain an IGD and the associated interfaces.

Note: Unless otherwise specified, the information in this document applies to the Intel®

82Q35, 82Q33, 82G33 Graphics and Memory Controller Hub (GMCH) and Intel® 82P35

Memory Controller Hub (MCH).

Note: The term (G)MCH refers to the 82Q35 GMCH, 82Q33 GMCH, 82G33 GMCH and 82P35

MCH.

Note: Unless otherwise specified, ICH9 refers to the Intel® 82801IB ICH9, Intel® 82801IR

ICH9R, and Intel® 82801IH ICH9DH I/O Controller Hub 9 components.

Note: The term ICH9 refers to the ICH9, ICH9R, and ICH9DH components.

82G33 Datasheet(PDF) 19 Page - Intel Corporation