82G33 datasheet(24/437 Pages) INTEL

24 / 437 page

Introduction

Datasheet

1.1

Terminology

Term

Description

ADD Card

Advanced Digital Display Card. Provides digital display options for an Intel

Graphics Controller that supports ADD cards (have DVOs multiplexed with

AGP interface). Keyed like an AGP 4x card and plugs into an AGP connector.

Will not work with an Intel Graphics Controller that implements Intel® SDVO.

ADD2 Card

Advanced Digital Display Card – 2nd Generation. Provides digital display

options for an Intel graphics controller that supports ADD2 cards. Plugs into

an x16 PCI Express* connector but utilizes the multiplexed SDVO interface.

Will not work with an Intel Graphics Controller that supports Intel® DVO and

ADD cards.

Chipset / Root

– Complex

Used in this specification to refer to one or more hardware components that

connects processor complexes to the I/O and memory subsystems. The

chipset may include a variety of integrated devices.

CLink

GMCH-ICH9 Control Link

Core

The internal base logic in the (G)MCH

CRT

Cathode Ray Tube

DBI

Dynamic Bus Inversion

DDR2

A second generation Double Data Rate SDRAM memory technology

DDR3

A third generation Double Data Rate SDRAM memory technology

DMA

Remapping

Translating the address in a DMA request (DVA) to a host physical address

(HPA)

DMI

(G)MCH-Intel® ICH9 Direct Media Interface

Domain

A collection of physical, logical or virtual resources that are allocated to work

together. Domain is used as a generic term for virtual machines, partitions,

etc.

DVI

Digital Video Interface. Specification that defines the connector and interface

for digital displays.

DVMT

Dynamic Video Memory Technology

FSB

Front Side Bus, synonymous with Host or processor bus

Full Reset

Full reset is when PWROK is de-asserted. Warm reset is when both RSTIN#

and PWROK are asserted.

GAW

Guest Address Width. GAW refers to the DMA virtual addressability limit.

GMCH

Graphics and Memory Controller Hub. GMCH is a component that contains

the processor interface, DRAM controller, and x16 PCI Express port (typically

the external graphics interface). It communicates with the I/O controller hub

(Intel® ICH9) over the DMI interconnect. The GMCH contains an embedded

graphics controller.

Memory Controller Hub. See MCH.

GPA

Guest Physical Address is the view of physical memory from software

running in a partition. GPA is also used in this document as an example

usage for DMA virtual addresses (DVA)

82G33 Datasheet(PDF) 24 Page - Intel Corporation

82G33 Datasheet(HTML) 24 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL