82G33 datasheet(61/437 Pages) INTEL

61 / 437 page

System Address Map

Datasheet

3.3

PCI Memory Address Range (TOLUD – 4GB)

This address range, from the top of low usable DRAM (TOLUD) to 4 GB is normally

mapped to the DMI Interface.

Device 0 exceptions are:

• Addresses decoded to the Express port registers (PXPEPBAR)

• Addresses decoded to the memory mapped range for internal (G)MCH registers

(MCHBAR)

• Addresses decoded to the flat memory-mapped address spaced to access device

configuration registers (PCIEXBAR)

• Addresses decoded to the registers associated with the Direct Media Interface

(DMI) register memory range. (DMIBAR)

With PCI Express port, there are two exceptions to this rule.

• Addresses decoded to the PCI Express Memory Window defined by the MBASE1

and MLIMIT1 registers are mapped to PCI Express.

• Addresses decoded to the PCI Express prefetchable Memory Window defined by

the PMBASE1 and PMLIMIT1 registers are mapped to PCI Express.

In integrated graphics configurations, there are exceptions to this rule:

• Addresses decoded to the IGD registers and internal graphics instruction port

(Function 0 MMADR, Function 1 MMADR)

• Addresses decode to the internal graphics translation window (GMADR)

• Addresses decode to the Internal graphics translation table (GTTADR)

In an Intel ME configuration, there are exceptions to this rule:

• Addresses decoded to the ME Keyboard and Text MMIO range (EPKTBAR)

• Addresses decoded to the ME HECI MMIO range (EPHECIBAR)

• Addresses decoded to the ME HECI2 MMIO range (EPHECI2BAR)

In a VT enable configuration, there are exceptions to this rule:

• Addresses decoded to the memory mapped window to Graphics VT remap engine

registers (GFXVTBAR)

• Addresses decoded to the memory mapped window to DMI VC1 VT remap engine

registers (DMIVC1BAR)

• Addresses decoded to the memory mapped window to ME VT remap engine

registers (VTMEBAR)

Addresses decoded to the memory-mapped window to PEG/DMI VC0 VT remap engine

registers (VTDPVC0BAR)

Some of the MMIO Bars may be mapped to this range or to the range above TOUUD.

82G33 Datasheet(PDF) 61 Page - Intel Corporation