33910 datasheet(30/90 Pages) FREESCALE

30 / 90 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

33910

FUNCTIONAL DEVICE OPERATIONS

OPERATIONAL MODES

MC33910G5AC/MC3433910G5AC

RESET

To reset a MCU the 33910 drives the RST pin low for the

time the reset condition lasts.

After the reset source is removed, the state machine will

drive the RST output low for at least 1.0 ms (typical value)

before driving it high.

In the 33910, four main reset sources exist:

5.0 V Regulator Low-voltage-Reset (VRSTTH)

The 5.0 V regulator output VDD is continuously monitored

against brown outs. If the supply monitor detects that the

voltage at the VDD pin has dropped below the reset threshold

VRSTTH the 33910 will issue a reset. In case of over-

temperature, the voltage regulator will be disabled and the

voltage monitoring will issue a VDDOT Flag independently of

the VDD voltage.

Window Watchdog Overflow

If the watchdog counter is not properly serviced while its

window is open, the 33910 will detect an MCU software run-

away and will reset the microcontroller.

Wake-up From Sleep Mode

During Sleep mode, the 5.0 V regulator is not active,

hence all wake-up requests from Sleep mode require a

power-up/reset sequence.

External Reset

The 33910 has a bidirectional reset pin which drives the

device to a safe state (same as Reset mode) for as long as

this pin is held low. The RST pin must be held low long

enough to pass the internal glitch filter and get recognized by

the internal reset circuit. This functionality is also active in

Stop mode.

After the RST pin is released, there is no extra tRST to be

considered.

WAKE-UP CAPABILITIES

Once entered into one of the low-power modes (Sleep or

Stop) only wake-up sources can bring the device into Normal

mode operation.

In Stop mode, a wake-up is signaled to the MCU as an

interrupt, while in Sleep mode the wake-up is performed by

activating the 5.0 V regulator and resetting the MCU. In both

cases the MCU can detect the wake-up source by accessing

the SPI registers and reading the Interrupt Source Register.

There is no specific SPI register bit to signal a CS wake-up or

external reset. If necessary this condition is detected by

excluding all other possible wake-up sources.

Wake-up from Wake-up input (L1) with cyclic sense

disabled

The wake-up line is dedicated to sense state changes of

external switch and wake-up the MCU (in Sleep or Stop

mode).

In order to select and activate direct wake-up from L1

input, the Wake-up Control Register (WUCR) must be

configured with appropriate L1WE input enabled or disabled.

The wake-up input’s state is read through the Wake-up

Status Register (WUSR).

L1 input is also used to perform cyclic-sense wake-up.

Note: Selecting an L1 input in the analog multiplexer

before entering low power mode will disable the wake-up

capability of the L1 input

Wake-up from Wake-up input (L1) with cyclic sense timer

enabled

The SBCLIN can wake-up at the end of a cyclic sense

period if on the wake-up input line (L1) a state change occurs.

One or both HSx switch can be activated in Sleep or Stop

modes from an internal timer. Cyclic sense and force wake-

up are exclusive. If cyclic sense is enabled, the force wake-

up can not be enabled.

In order to select and activate the cyclic sense wake-up

from the L1 input, before entering in low power modes (Stop

or Sleep modes), the following SPI set-up has to be

performed:

In WUCR: select the L1 input to WU-enable.

In HSCR: enable the desired HSx.

• In TIMCR: select the CS/WD bit and determine the

cyclic sense period with CYSTx bits.

• Perform Goto Sleep/Stop command.

Forced Wake-up

The 33910 can wake-up automatically after a

predetermined time spent in Sleep or Stop mode. Cyclic

sense and Forced wake-up are exclusive. If Forced wake-up

is enabled, the Cyclic Sense can not be enabled.

To determine the wake-up period, the following SPI set-up

has to be sent before entering in low power modes:

• In TIMCR: select the CS/WD bit and determine the low

power mode period with CYSTx bits.

• In HSCR: all HSx bits must be disabled.

CS Wake-up

While in Stop mode, a rising edge on the CS will cause a

wake-up. The CS wake-up does not generate an interrupt,

and is not reported on SPI.

LIN Wake-up

While in the low-power mode, the 33910 monitors the

activity on the LIN bus. A dominant pulse larger than tPROPWL

followed by a dominant to recessive transition will cause a

LIN wake-up. This behavior protects the system from a short

to ground bus condition. The bit RXONLY = 1 from LINCR

33910 Datasheet(PDF) 30 Page - Freescale Semiconductor, Inc

33910 Datasheet(HTML) 30 Page - Freescale Semiconductor, Inc

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