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CC1111F32RSP Datasheet(PDF) 87 Page - Texas Instruments |
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CC1111F32RSP Datasheet(HTML) 87 Page - Texas Instruments |
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87 / 247 page ![]() CC1110Fx / CC1111Fx SWRS033G Page 87 of 244 The steps required to start a CPU flash write operation are shown in Figure 23. Note that code must be run from RAM in unified memory space. Figure 23: CPU Flash Write Executed from RAM Figure 24. Flash Write Timeout 12.3.3 Flash Page Erase After a flash page erase, all bytes in the erased page are set to 1. A page erase is initiated by setting FCTL.ERASE to 1. The page addressed by FADDRH[5:1] is erased when a page erase is initiated. Note that if a page erase is initiated simultaneously with a page write, i.e. FCTL.WRITE is set to 1, the page erase will be performed before the page write operation. The FCTL.BUSY bit can be polled to see when the page erase has completed. The steps required to perform a flash page erase from within flash memory are outlined in Figure 25. Note that, while executing program code from within flash memory, when a flash erase or write operation is initiated, program execution Note: If flash erase operations are performed from within flash memory and the watchdog timer is enabled, a watchdog timer interval must be selected that is longer than 20 ms, the duration of the flash page erase operation, so that the CPU will manage to clear the watchdog timer. |
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