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R5F5631ADDFB Datasheet(PDF) 55 Page - Renesas Technology Corp |
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R5F5631ADDFB Datasheet(HTML) 55 Page - Renesas Technology Corp |
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55 / 108 page  R01DS0098EJ0090 Rev.0.90 Page 55 of 106 Dec 27, 2011 RX63N Group, RX631 Group 4. I/O Registers Under development Preliminary document Specifications in this document are tentative and subject to change. 0008 201Fh DMAC0 DMA activation source flag control register DMCSL 8 8 2 ICLK 0008 2040h DMAC1 DMA source address register DMSAR 32 32 2 ICLK 0008 2044h DMAC1 DMA source address register DMDAR 32 32 2 ICLK 0008 2048h DMAC1 DMA transfer count register DMCRA 32 32 2 ICLK 0008 204Ch DMAC1 DMA block transfer count register DMCRB 16 16 2 ICLK 0008 2050h DMAC1 DMA transfer mode register DMTMD 16 16 2 ICLK 0008 2053h DMAC1 DMA interrupt setting register DMINT 8 8 2 ICLK 0008 2054h DMAC1 DMA address mode register DMAMD 16 16 2 ICLK 0008 205Ch DMAC1 DMA transfer enable register DMCNT 8 8 2 ICLK 0008 205Dh DMAC1 DMA software start register DMREQ 8 8 2 ICLK 0008 205Eh DMAC1 DMA status register DMSTS 8 8 2 ICLK 0008 205Fh DMAC1 DMA activation source flag control register DMCSL 8 8 2 ICLK 0008 2080h DMAC2 DMA source address register DMSAR 32 32 2 ICLK 0008 2084h DMAC2 DMA source address register DMDAR 32 32 2 ICLK 0008 2088h DMAC2 DMA transfer count register DMCRA 32 32 2 ICLK 0008 208Ch DMAC2 DMA block transfer count register DMCRB 16 16 2 ICLK 0008 2090h DMAC2 DMA transfer mode register DMTMD 16 16 2 ICLK 0008 2093h DMAC2 DMA interrupt setting register DMINT 8 8 2 ICLK 0008 2094h DMAC2 DMA address mode register DMAMD 16 16 2 ICLK 0008 209Ch DMAC2 DMA transfer enable register DMCNT 8 8 2 ICLK 0008 209Dh DMAC2 DMA software start register DMREQ 8 8 2 ICLK 0008 209Eh DMAC2 DMA status register DMSTS 8 8 2 ICLK 0008 209Fh DMAC2 DMA activation source flag control register DMCSL 8 8 2 ICLK 0008 20C0h DMAC3 DMA source address register DMSAR 32 32 2 ICLK 0008 20C4h DMAC3 DMA source address register DMDAR 32 32 2 ICLK 0008 20C8h DMAC3 DMA transfer count register DMCRA 32 32 2 ICLK 0008 20CCh DMAC3 DMA block transfer count register DMCRB 16 16 2 ICLK 0008 20D0h DMAC3 DMA transfer mode register DMTMD 16 16 2 ICLK 0008 20D3h DMAC3 DMA interrupt setting register DMINT 8 8 2 ICLK 0008 20D4h DMAC3 DMA address mode register DMAMD 16 16 2 ICLK 0008 20DCh DMAC3 DMA transfer enable register DMCNT 8 8 2 ICLK 0008 20DDh DMAC3 DMA software start register DMREQ 8 8 2 ICLK 0008 20DEh DMAC3 DMA status register DMSTS 8 8 2 ICLK 0008 20DFh DMAC3 DMA activation source flag control register DMCSL 8 8 2 ICLK 0008 2200h DMAC DMACA module activation register DMAST 8 8 2 ICLK 0008 2400h DTC DTC control register DTCCR 8 8 2 ICLK 0008 2404h DTC DTC vector base register DTCVBR 32 32 2 ICLK 0008 2408h DTC DTC address mode register DTCADMOD 8 8 2 ICLK 0008 240Ch DTC DTC module start register DTCST 8 8 2 ICLK 0008 240Eh DTC DTC status register DTCSTS 16 16 2 ICLK 0008 2800h EXDMAC0 EXDMA source address register EDMSAR 32 32 1, 2 BCLK 0008 2804h EXDMAC0 EXDMA destination address register EDMDAR 32 32 1, 2 BCLK 0008 2808h EXDMAC0 EXDMA transfer count register EDMCRA 32 32 1, 2 BCLK 0008 280Ch EXDMAC0 EXDMA block transfer count register EDMCRB 16 16 1, 2 BCLK 0008 2810h EXDMAC0 EXDMA transfer mode register EDMTMD 16 16 1, 2 BCLK 0008 2812h EXDMAC0 EXDMA output setting register EDMOMD 8 8 1, 2 BCLK 0008 2813h EXDMAC0 EXDMA interrupt setting register EDMINT 8 8 1, 2 BCLK 0008 2814h EXDMAC0 EXDMA address mode register EDMAMD 32 32 1, 2 BCLK 0008 2818h EXDMAC0 EXDMA offset register EDMOFR 32 32 1, 2 BCLK 0008 281Ch EXDMAC0 EXDMA transfer enable register EDMCNT 8 8 1, 2 BCLK 0008 281Dh EXDMAC0 EXDMA software start register EDMREQ 8 8 1, 2 BCLK 0008 281Eh EXDMAC0 EXDMA status register EDMSTS 8 8 1, 2 BCLK Table 4.1 List of I/O Registers (Address Order) (2/44) Address Module Symbol Register Name Register Symbol Number of Bits Access Size Number of Access States ICLK PCLK ICLK<PCLK |
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