R5F5631ADDFB datasheet(13/108 Pages) RENESAS

13 / 108 page

R01DS0098EJ0090 Rev.0.90

Page 13 of 106

Dec 27, 2011

RX63N Group, RX631 Group

1. Overview

Under development Preliminary document

Specifications in this document are tentative and subject to change.

Bus control

WE#

Output

Output pin for SDRAM write enable signals.

DQM0 to DQM3

Output

Output pins for SDRAM I/O data mask enable signals.

CS0# to CS7#

Output

Select signals for CS area.

WAIT#

Input

Input pins for wait request signals in access to the external

space.

EXDMA controller

EDREQ0, EDREQ1

Input pins for external DMA transfer requests.

EDACK0, EDACK1

Output pins for single address transfer acknowledge signals.

Interrupt

NMI

Input

Non-maskable interrupt request signal.

IRQ0 to IRQ15

Input

Maskable interrupt request signals.

Multi-function timer pulse

unit 2

MTIOC0A, MTIOC0B

MTIOC0C, MTIOC0D

I/O

The TGRA0 to TGRD0 input capture input/output compare

output/PWM output pins.

MTIOC1A, MTIOC1B

I/O

The TGRA1 and TGRB1 input capture input/output compare

output/PWM output pins.

MTIOC2A, MTIOC2B

I/O

The TGRA2 and TGRB2 input capture input/output compare

output/PWM output pins.

MTIOC3A, MTIOC3B

MTIOC3C, MTIOC3D

I/O

The TGRA3 to TGRD3 input capture input/output compare

output/PWM output pins.

MTIOC4A, MTIOC4B

MTIOC4C, MTIOC4D

I/O

The TGRA4 to TGRD4 input capture input/output compare

output/PWM output pins.

MTIC5U, MTIC5V

MTIC5W

Input

The TGRU5, TGRV5, and TGRW5 input capture input/dead

time compensation input pins.

MTCLKA, MTCLKB

MTCLKC, MTCLKD

Input

Input pins for external clock signals.

Port output enable 2

POE0# to POE3#

POE8#

Input

Input pins for request signals to place the MTU large-current

pins in the high impedance state.

16-bit timer pulse unit

TIOCA0, TIOCB0

TIOCC0, TIOCD0

I/O

The TGRA0 to TGRD0 input capture input/output compare

output/PWM output pins.

TIOCA1, TIOCB1

I/O

The TGRA1 and TGRB1 input capture input/output compare

output/PWM output pins.

TIOCA2, TIOCB2

I/O

The TGRA2 and TGRB2 input capture input/output compare

output/PWM output pins.

TIOCA3, TIOCB3

TIOCC3, TIOCD3

I/O

The TGRA3 to TGRD3 input capture input/output compare

output/PWM output pins.

TIOCA4, TIOCB4

I/O

The TGRA4 and TGRB4 input capture input/output compare

output/PWM output pins.

TIOCA5, TIOCB5

I/O

The TGRA5 and TGRB5 input capture input/output compare

output/PWM output pins.

TCLKA, TCLKB

TCLKC, TCLKD

Input

Input pins for external clock signals.

TIOCA6, TIOCB6

TIOCC6, TIOCD6

I/O

The TGRA6 to TGRD6 input capture input/output compare

output/PWM output pins.

TIOCA7, TIOCB7

I/O

The TGRA7 and TGRB7 input capture input/output compare

output/PWM output pins.

TIOCA8, TIOCB8

I/O

The TGRA8 and TGRB8 input capture input/output compare

output/PWM output pins.

TIOCA9, TIOCB9

TIOCC9, TIOCD9

I/O

The TGRA9 to TGRD9 input capture input/output compare

output/PWM output pins.

TIOCA10, TIOCB10

I/O

The TGRA10 and TGRB10 input capture input/output compare

output/PWM output pins.

TIOCA11, TIOCB11

I/O

The TGRA11 and TGRB11 input capture input/output compare

output/PWM output pins.

TCLKE, TCLKF

TCLKG, TCLKH

Input

Input pins for external clock signals.

Programmable pulse

generator

PO0 to PO31

Output

Output pins for the pulse signals.

Table 1.4

Pin Functions (2/6)

Classifications

Pin Name

I/O

Description

R5F5631ADDFB Datasheet(PDF) 13 Page - Renesas Technology Corp

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