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PCA9554CBS Datasheet(PDF) 25 Page - NXP Semiconductors |
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PCA9554CBS Datasheet(HTML) 25 Page - NXP Semiconductors |
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25 / 36 page ![]() PCA9554B_PCA9554C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 19 September 2012 25 of 36 NXP Semiconductors PCA9554B; PCA9554C Low-voltage 8-bit I2C-bus/SMBus low power I/O port a. P port load configuration b. Write mode (R/W =0) c. Read mode (R/W =1) CL includes probe and jig capacitance. tv(Q) is measured from 0.7 VDD on SCL to 50 % I/O (Pn) output. All inputs are supplied by generators having the following characteristics: PRR 10 MHz; Z o =50 ; tr/tf 30 ns. The outputs are measured one at a time, with one transition per measurement. All parameters and waveforms are not applicable to all devices. Fig 28. P port load circuit and voltage waveforms 002aag805 DUT CL = 50 pF 500 Ω Pn 2 × VDD 500 Ω 002aag806 SCL SDA P0 A tv(Q) 0.3 × VDD 0.7 × VDD P7 last stable bit unstable data Pn 002aag807 SCL Pn P0 A th(D) 0.3 × VDD 0.7 × VDD P7 tsu(D) |
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