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IO96NDB2V1 Datasheet(PDF) 164 Page - Microsemi Corporation |
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IO96NDB2V1 Datasheet(HTML) 164 Page - Microsemi Corporation |
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164 / 242 page ![]() ProASIC3L DC and Switching Characteristics 2-148 Revision 13 Embedded FlashROM Characteristics Timing Characteristics Figure 2-55 • Timing Diagram A0 A1 tSU tHOLD tSU tHOLD tSU tHOLD tCKQ2 tCKQ2 tCKQ2 CLK Address Data D0 D0 D1 Table 2-220 • Embedded FlashROM Access Time – Applies to 1.5 V DC Core Voltage Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V Parameter Description –1 Std. Units tSU Address Setup Time 0.54 0.64 ns tHOLD Address Hold Time 0.00 0.00 ns tCK2Q Clock to Out 16.55 19.46 ns FMAX Maximum Clock Frequency 15 15 MHz Table 2-221 • Embedded FlashROM Access Time– Applies to 1.2 V DC Core Voltage Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V Parameter Description –1 Std. Units tSU Address Setup Time 0.71 0.83 ns tHOLD Address Hold Time 0.00 0.00 ns tCK2Q Clock to Out 21.64 25.44 ns FMAX Maximum Clock Frequency 15 15 MHz |
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