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AN2242 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN2242 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 31 page ![]() 2 Circuit Description AN2242 8/31 Here follow some waveforms during normal operation at full load: The pictures above show the drain voltage and current signal on pin #12 at the nominal input mains voltage during normal operation at full load. The Envelope acquisition of the scope provides for the possibility to observe the modulation of the two waveforms, due to the mains input voltage ripple at twice the line frequency. Figure 5. The drain voltage waveforms and the measurement of the peak voltage at full load and maximum input mains voltage are shown. The maximum voltage peak in this condition is 524V, which ensures a reliable operation of the power MOSFET with a good margin against the maximum BVDSS. The operation during the hard-disk spin-up when the SMPS delivers the peak power to the loads, brings the drain voltage peak at 540Vpk. Figure 5. Vin = 265 Vrms - 50Hz Figure 5. and Figure 6. depict the most salient controller IC signals. In all pictures it is possible to distinguish clean waveforms free of hard spikes or noise that could affect the controller Figure 3. Vin = 115 Vrms - 60Hz Figure 4. Vin = 230 Vrms - 50Hz CH1: DRAIN VOLTAGE CH2: DRAIN CURRENT - VPIN12 (Isen) CH1: DRAIN VOLTAGE CH2: DRAIN CURRENT - VPIN12 (Isen) CH1: DRAIN VOLTAGE CH2: DRAIN CURRENT - VPIN12 (Isen) |
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