AN2941 datasheet(8/37 Pages) STMICROELECTRONICS

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Main characteristics and circuit description

AN2941

8/37

Doc ID 15447 Rev 4

During light-load operation the PFC controller is stopped by the PWM controller, so the

MOSFET doesn’t switch and there is no reflected voltage on the auxiliary winding. C1, C2

and C3 are no longer charged and discharged and so both the multiplier and the feedback

networks do not dissipate.

The divider R3, R5, R11, R10 and R19, directly connected to the output voltage, is

dedicated to protect the circuit in case of output overvoltage or open loop via pin PFC_OK

(#7).

Tracking boost option

To maximize overall efficiency the PFC makes use of the “Tracking Boost Option”. With this

function implemented the PFC DC output voltage changes proportionally to the mains

voltage. The L6563S can implement this function by just adding a resistor (R30) connected

to the dedicated pin (TBO, #6). Furthermore, the tracking boost option allows the use of a

smaller (and cheaper) inductor. In this case a 400 µH inductor has been used while, with a

fixed output voltage PFC working at similar operating frequency, a 700 µH inductor is

needed.

Fast voltage feed-forward

The voltage on the L6563S Vff pin (#5) is the peak value of the voltage on MULT pin (#3).

The RC network (R34, C21) connected to Vff completes the peak-holding circuit. This signal

is necessary to derive information from the RMS input voltage to compensate the loop gain

that is mains voltage dependent.

Generally speaking, if the time constant is too small, the voltage generated is affected by a

considerable amount of ripple at twice the mains frequency, causing distortion of the current

reference (resulting in high THD and poor PF). If the time constant is too large there is a

considerable delay in setting the right amount of feed-forward, resulting in excessive

overshoot or undershoot of the pre-regulator's output voltage in response to large line

voltage changes.

To overcome this issue, the L6563S implements the new fast Vff function. As soon as the

voltage on the Vff pin decreases from a set threshold (40 mV typically), a mains dip is

assumed and an internal switch rapidly discharges the Vff capacitor via a 10 k

Ω resistor.

Thanks to this feature it is possible to set an RC circuit with a long time constant, assuring a

low THD, and keeping a fast response to the mains dip.

Flyback power stage

The downstream converter, acting as the master stage, implements the ST L6566A (U6), a

new dedicated current mode controller. The IC operates in quasi-resonant mode detecting

the transformer demagnetization by pin ZCD (#11). R42 on pin OSC (#13) sets the

maximum switching frequency at about 125 kHz. This value has been chosen to limit the

switching losses.

Due to the fact that the maximum switching frequency is imposed, the converter operates in

discontinuous conduction mode during light-load operation. Thanks to the L6566A valley

skipping function, even in this condition, the flyback operates in valley switching, reducing

switching losses. The MOSFET is a standard 800 V, STF7NM80, housed in the TO-220FP

package, needing just a small heat sink. The transformer is layer type, using a standard

ferrite size EER35. The transformer, designed according to EN60950, is manufactured by

TDK. The flyback reflected voltage is ~130 V, providing enough room for the leakage

inductance voltage spike with still margin for reliability of the MOSFET. The rectifier D8 and

the transil D4 clamp the peak of the leakage inductance voltage spike at MOSFET turn-off.

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