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AN4192 Datasheet(PDF) 16 Page - STMicroelectronics |
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AN4192 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 47 page ![]() High-side MOSFET selection AN4192 16/47 Doc ID 023820 Rev 1 Figure 15. Typical phase node waveform (without RC snubber network) Slowing down the HS turn-on is useful in order to reduce the phase node ringing, so a higher RG,EXT should be used. But, the higher the RG,EXT, the bigger the switching losses (particularly at turn-off) become: a low RG,EXT is helpful because it reduces the HS switching losses at turn-off. The “asymmetric gate drive circuit” tries to make a trade-off between these two different requirements (Figure 16). RG1 is the turn-on gate resistor, D is a diode and RG2 is the turn-off gate resistor: ● When the HS turns on, D is reverse biased so the gate voltage is applied to the gate through RG1. So, its value may be selected high enough, in order to lower the HS switching speed and therefore the phase node spike. ● At HS turn-off, D is forward biased offering a low-resistance path to the HS discharging current. RG2 is the turn-off resistor because RG1 is shorted. If RG2 is 0 Ω, the HS switching speed at turn-off is the highest and the impact on the switching losses is minimized. Figure 13. HS turn-off Figure 14. HS turn-on (phase node spike) AM16457V1 AM16458V1 AM16459V1 |
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