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AN4013 Datasheet(PDF) 29 Page - STMicroelectronics

Part # AN4013
Description  The purpose of this document
PDF  37 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4013 Datasheet(HTML) 29 Page - STMicroelectronics

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AN4013
Advanced features for motor control
36
4.3.3
Locking mechanism
The advanced timers registers and bits can be protected or locked in order to safeguard the
application using the locking mechanism by programming the LOCK bits in the BDTR
register. There are three locking levels.
Note:
The LOCK bits can be written only once after the reset. Once the BDTR register has been
written, its content is frozen until the next reset.
Table 5. Behavior of timer outputs versus Break1 and Break2 inputs
Break input 1
Break input 2
OCxN output
OCx output
Active
Inactive
ON after deadtime
insertion
OFF
Inactive
Active
OFF
OFF
Active
-
ON after deadtime
insertion
OFF
Table 6. Locking levels
Level 1
LOCK Level 2(1)
1. LOCK Level 2 = LOCK Level 1 + CC polarity bits (CCxP/CCxNP bits in TIMx_CCER)
LOCK Level 3(2)
2. LOCK Level 3 = LOCK Level 2 + CC control bits (OCxM and OCxPE
Register
Bits
Register
Bits
Register
Bits
CR2
OISx
CR2
OISx
CR2
OISx
OISxN
OISxN
OISxN
BDTR
DTG[7:0]
BDTR
DTG[7:0]
BDTR
DTG[7:0]
BKE
BKE
BKE
BKP
BKP
BKP
AOE
AOE
AOE
-
BK2E(3)
3. Bits present in STM32F30x and STM32F3x8 products lines.
OSSR
OSSR
-
BK2P(3)
OSSI
OSSI
-
BKF[3:0](3)
CCER
CCxP
CCER
CCxP
-
BK2F[3:0](3)
CCxNP
CCxNP
-
-
-
-
CCMRx
OCxM
-
-
-
-
OCxPE



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