UPD78323LP datasheet(29/86 Pages) NEC

29 / 86 page

µPD78323, 78324

2.3.1

General Register Addressing

The general registers consist of eight register banks, each consisting of sixteen 8-bit registers or eight 16-bit registers.

General register addressing is carried out using the register specify field of 3 or 4 bits supplied from an instruction word,

the register bank select flag (RBS0 to RBS2) and the register set select flag (RSS) in the PSW.

2.3.2

Short Direct Addressing

Short direct addressing which enables direct address specification by 1-byte data in an instruction work is applied to the

FE20H to FF1FH space. The short direct memory is accessed as 8-bit or 16-bit data. When accessing the memory as 16-

bit data, specification of even data for 1-byte address specify data will cause 2-byte data specified by continuous addresses

of even and odd addresses to be accessed. (Do not specify odd number for address specify data.)

2.3.3

Special Function Register (SFR) Addressing

This addressing is applied to operations for the special function register (SFR) mapped in the SFR area of FF00H to

FFFFH. Addressing is performed by 1-byte data in the instruction word corresponding to the lower 8 bits of the special

function register address. For 16-bit access of 16-bit operational SFR, 2-byte data specified by continuous even and odd

addresses is accessed as is the case with short direct addressing.

UPD78323LP Datasheet(PDF) 29 Page - NEC