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UPD78323LP Datasheet(PDF) 16 Page - NEC |
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UPD78323LP Datasheet(HTML) 16 Page - NEC |
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16 / 86 page  16 µPD78323, 78324 2. CPU ARCHITECTURE 2.1 MEMORY SPACE In the µPD78324 a maximum of 64K bytes of memory can be addressed (see Figure 2-1). Program fetches can be performed within the area from 0000H to FDFFH. However, when external memory expansion is implemented in the area from FE00H to FFFFH (main RAM and special function register area), program fetches can also be performed on this area. In this case, a program fetch is performed on the external memory, not on the main RAM or special function registers. (1) Vector table area Interrupt request from the peripheral hardware, reset input, external interrupt request and interrupt branch address by break instruction are stored in the 0000H to 003FH 64-byte area. Generation of an interrupt request sets the even address content of each table in the lower 8 bits of the program counter (PC) and the odd address content in the higher 8 bits. Interrupt Source Vector Table Address RESET (RESET pin input) ........................................... 0000H NMI (NMI pin input) ................................................ 0002H WDT (Watchdog timer) ............................................ 0004H TMF0 (Realtime pulse unit) ....................................... 0006H EXF0 (INTP0 pin input) ............................................. 0008H EXF1 (INTP1 pin input) ............................................. 000AH EXF2 (INTP2 pin input) ............................................. 000CH EXF3 (INTP3 pin input) ............................................. 000EH EXF4/CCFX0 (INTP4 pin input/realtime pulse unit) ............. 0010H EXF5/CCFX1 (INTP5 pin input/realtime pulse unit) ............. 0012H EXF6/TI (INTP6/TI pin input) ........................................ 0014H CMF00 (Realtime pulse unit) ....................................... 0016H CMF01 (Realtime pulse unit) ....................................... 0018H CMF02 (Realtime pulse unit) ....................................... 001AH CMF03 (Realtime pulse unit) ....................................... 001CH CMF10 (Realtime pulse unit) ....................................... 001EH CMF11 (Realtime pulse unit) ....................................... 0020H SRF (Serial receive complete) ................................ 0024H STF (Serial send complete) .................................... 0026H CSIIF (Clock synchronous serial interface) .............. 0028H ADF (A/D converter) ................................................ 002AH Operation code trap ................................................................... 003CH BRK (Break instruction) ........................................... 003EH If bit 1 (TPF) of CPU control word (CCW) is set to 1, the 8002H to 803FH external memory area is used as an interrupt vector table in place of 0002H to 003FH. |
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