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UPD78323LP Datasheet(PDF) 64 Page - NEC |
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UPD78323LP Datasheet(HTML) 64 Page - NEC |
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64 / 86 page  64 µPD78323, 78324 OSCILLATOR CHARACTERISTICS (TA = –10 to +70 °C, VDD = +5 V ±10 %, VSS = 0 V) Parameter Oscillation frequency (fXX) X1 input frequency (fX) X1 input rise/fall time (tXR, tXF) X1 input high/low level width (tWXH , tWXL) MIN. 8 8 0 25 Unit MHz MHz ns ns MAX. 16 16 20 80 Recommended Circuit or X1 X2 HCMOS Invertor Resonator Ceramic resonator or crystal resonator External clock X1 X2 HCMOS Invertor Open X1 X2 C1 C2 VSS Caution When using the system clock oscillation circuit, wire the part encircled in the dotted line in the following manner to avoid the influence of the wiring capacity, etc. • Make the wiring as short as possible. • Avoid intersecting other signal conductors. Avoid approaching lines in which very high fluctuating currents run. • Make sure that the grounding point of the oscillation circuit capacitor always has the same electrical potential as VSS. Avoid grounding with a grand pattern in which very high currents run. • Do not fetch signals from the oscillation circuit. |
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