PIC16LC773-04SLASHSP datasheet(29/200 Pages) MICROCHIP

29 / 200 page

PIC16C77X

Advance Information

DS30275A-page 29

3.2

PORTB and the TRISB Register

PORTB is an 8-bit wide bi-directional port. The corre-

sponding data direction register is TRISB. Setting a

TRISB bit (=1) will make the corresponding PORTB pin

an input, i.e., put the corresponding output driver in a

hi-impedance mode. Clearing a TRISB bit (=0) will

make the corresponding PORTB pin an output, i.e., put

the contents of the output latch on the selected pin.

EXAMPLE 3-1:

INITIALIZING PORTB

BCF

STATUS, RP0

;

CLRF

PORTB

; Initialize PORTB by

; clearing output

; data latches

BSF

STATUS, RP0

; Select Bank 1

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISB

; Set RB<3:0> as inputs

; RB<5:4> as outputs

; RB<7:6> as inputs

Each of the PORTB pins has a weak internal pull-up. A

single control bit can turn on all the pull-ups. This is per-

formed by clearing bit RBPU (OPTION_REG<7>). The

weak pull-up is automatically turned off when the port

pin is configured as an output. The pull-ups are dis-

abled on a Power-on Reset.

The RB0 pin is multiplexed with the external interrupt

(RB0/INT).

FIGURE 3-4:

BLOCK DIAGRAM OF RB0 PIN

The RB1 pin is multiplexed with the SSP module slave

select (RB1/SS).

FIGURE 3-5:

BLOCK DIAGRAM OF RB1/SS

The RB2 pin is multiplexed with analog channel 8

(RB2/AN8).

FIGURE 3-6:

BLOCK DIAGRAM OF

RB2/AN8 PIN

Data Latch

RBPU(2)

VDD

Data bus

WR Port

WR TRIS

RD TRIS

RD Port

weak

pull-up

RD Port

RB0/INT

I/O

pin(1)

TTL

Input

Buffer

Note 1: I/O pins have diode protection to VDD and VSS.

2: To enable weak pull-ups, set the appropriate TRIS bit(s)

and clear the RBPU bit (OPTION_REG<7>).

Schmitt Trigger

Buffer

TRIS Latch

Data Latch

RBPU(2)

VDD

Data bus

WR Port

WR TRIS

RD TRIS

RD Port

weak

pull-up

RD Port

SS input

I/O

pin(1)

TTL

Input

Buffer

Note 1: I/O pins have diode protection to VDD and VSS.

2: To enable weak pull-ups, set the appropriate TRIS bit(s)

and clear the RBPU bit (OPTION_REG<7>).

Schmitt Trigger

Buffer

TRIS Latch

Data Latch

RBPU(2)

VDD

Data bus

WR Port

WR TRIS

RD TRIS

RD Port

weak

pull-up

RD Port

To A/D converter

I/O

pin(1)

TTL

Input

Buffer

Note 1: I/O pins have diode protection to VDD and VSS.

2: To enable weak pull-ups, set the appropriate TRIS bit(s)

and clear the RBPU bit (OPTION_REG<7>).

TRIS Latch

Analog

input mode

PIC16LC773-04/SP Datasheet(PDF) 29 Page - Microchip Technology

PIC16LC773-04/SP Datasheet(HTML) 29 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL