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PIC16LC773-04/SP Datasheet(PDF) 93 Page - Microchip Technology

Part # PIC16LC773-04/SP
Description  28/40-Pin, 8-Bit CMOS Microcontrollers w/ 12-Bit A/D
PDF  200 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16LC773-04/SP Datasheet(HTML) 93 Page - Microchip Technology

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PIC16C77X
© 1999 Microchip Technology Inc.
Advance Information
DS30275A-page 93
8.2.18.16 BUS COLLISION DURING A REPEATED
START CONDITION
During a Repeated Start condition, a bus collision
occurs if:
a)
A low level is sampled on SDA when SCL goes
from low level to high level.
b)
SCL goes low before SDA is asserted low, indi-
cating that another master is attempting to trans-
mit a data ’1’.
When the user de-asserts SDA and the pin is allowed
to float high, the BRG is loaded with SSPADD<6:0>,
and counts down to 0.
The SCL pin is then de-
asserted, and when sampled high, the SDA pin is sam-
pled. If SDA is low, a bus collision has occurred (i.e.
another master is attempting to transmit a data ’0’). If
however SDA is sampled high then the BRG is
reloaded and begins counting. If SDA goes from high
to low before the BRG times out, no bus collision
occurs, because no two masters can assert SDA at
exactly the same time.
If, however, SCL goes from high to low before the BRG
times out and SDA has not already been asserted, then
a bus collision occurs. In this case, another master is
attempting to transmit a data ’1’ during the Repeated
Start condition.
If at the end of the BRG time out both SCL and SDA are
still high, the SDA pin is driven low, the BRG is
reloaded, and begins counting. At the end of the count,
regardless of the status of the SCL pin, the SCL pin is
driven low and the Repeated Start condition is com-
plete (Figure 8-38).
FIGURE 8-38: BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)
FIGURE 8-39: BUS COLLISION DURING REPEATED START CONDITION (CASE 2)
SDA
SCL
RSEN
BCLIF
S
SSPIF
Sample SDA when SCL goes high.
If SDA = 0, set BCLIF and release SDA and SCL
Cleared in software
’0’
’0’
’0’
’0’
SDA
SCL
BCLIF
RSEN
S
SSPIF
Interrupt cleared
in software
SCL goes low before SDA,
Set BCLIF. Release SDA and SCL
TBRG
TBRG
’0’
’0’
’0’
’0’



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