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PIC16LC773-04/SP Datasheet(PDF) 34 Page - Microchip Technology

Part # PIC16LC773-04/SP
Description  28/40-Pin, 8-Bit CMOS Microcontrollers w/ 12-Bit A/D
PDF  200 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16LC773-04/SP Datasheet(HTML) 34 Page - Microchip Technology

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PIC16C77X
DS30275A-page 34
Advance Information
© 1999 Microchip Technology Inc.
3.4
PORTD and TRISD Registers
This section is applicable to the 40/44-pin devices only.
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configurable as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
FIGURE 3-10: PORTD BLOCK DIAGRAM (IN
I/O PORT MODE)
TABLE 3-7
PORTD FUNCTIONS
TABLE 3-8
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Data
bus
WR
PORT
WR
TRIS
RD PORT
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
input
buffer
I/O pin(1)
Note 1: I/O pins have protection diodes to VDD and VSS.
Q
D
CK
Q
D
CK
EN
QD
EN
Name
Bit#
Buffer Type
Function
RD0/PSP0
bit0
ST/TTL(1)
Input/output port pin or parallel slave port bit0
RD1/PSP1
bit1
ST/TTL(1)
Input/output port pin or parallel slave port bit1
RD2/PSP2
bit2
ST/TTL(1)
Input/output port pin or parallel slave port bit2
RD3/PSP3
bit3
ST/TTL(1)
Input/output port pin or parallel slave port bit3
RD4/PSP4
bit4
ST/TTL(1)
Input/output port pin or parallel slave port bit4
RD5/PSP5
bit5
ST/TTL(1)
Input/output port pin or parallel slave port bit5
RD6/PSP6
bit6
ST/TTL(1)
Input/output port pin or parallel slave port bit6
RD7/PSP7
bit7
ST/TTL(1)
Input/output port pin or parallel slave port bit7
Legend: ST = Schmitt Trigger input TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffer when in Parallel Slave Port Mode.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on all
other resets
08h
PORTD
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
xxxx xxxx
uuuu uuuu
88h
TRISD
PORTD Data Direction Register
1111 1111
1111 1111
89h
TRISE
IBF
OBF
IBOV
PSPMODE
—
PORTE Data Direction Bits
0000 -111
0000 -111
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTD.



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