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XRT72L13 Datasheet(PDF) 25 Page - Exar Corporation |
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XRT72L13 Datasheet(HTML) 25 Page - Exar Corporation |
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25 / 370 page ![]() áç áç áç áç XRT72L13 M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC PRELIMINARY REV. P1.0.6 13 65 A0 I Address Bus Input (Microprocessor Interface) - LSB (Least Sig- nificant Bit) (Please see description for A8) 66 D0 I/O Bi-directional Data Bus (Microprocessor Interface Section): Please see description for D7 67 A1 I Address Bus Input (Microprocessor Interface) - LSB (Least Sig- nificant Bit) (Please see description for A8) 68 INT O Interrupt Request Output: This open-drain, active-low output signal will be asserted when the Framer is requesting interrupt service from the local microprocessor. This output pin should typically be connected to the "Interrupt Request" input of the local microprocessor. 69 D1 I/O Bi-directional Data Bus (Microprocessor Interface Section): Please see description for D7 70 A2 I Address Bus Input (Microprocessor Interface) - LSB (Least Significant Bit) (Please see description for A8) 71 MOTO I Motorola/Intel Processor Interface Select Mode: This input pin allows the user to configure the Microprocessor Inter- face to interface with either a "Motorola-type" or "Intel-type" micropro- cessor/microcontroller. Tying this input pin to VCC, configures the microprocessor interface to operate in the Motorola mode (e.g., the Framer can be readily interfaced to a "Motorola type" local micropro- cessor). Tying this input pin to GND configures the Microprocessor Interface to operate in the Intel Mode (e.g., the Framer can be readily interfaced to a Intel type" local microprocessor). 72 GND **** Ground Pin 73 D2 I/O Bi-directional Data Bus (Microprocessor Interface Section): Please see description for D7 74 A3 I Address Bus Input (Microprocessor Interface) - LSB (Least Sig- nificant Bit) (Please see description for A8) PIN DESCRIPTIONS PIN #NAME TYPE DESCRIPTION |
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