XRT72L13 datasheet(83/370 Pages) EXAR

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M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13

PRELIMINARY

REV. 1.0.6

circuitry (within the user's system) should

assert the CS* input pin of the Framer, by tog-

gling it "low". This step enables further commu-

nication between the µC/µP and the Framer

Microprocessor Interface block.

A.3

Assert the ALE_AS (Address Latch Enable)

pin by toggling it "high". This step enables the

"Address Bus" input drivers, within the Micro-

processor Interface block of the Framer.

A.4

After allowing the data on the Address Bus pins

to settle (by waiting the appropriate "Address"

Data Setup time"), the µC/µP should then tog-

gle the ALE_AS pin "low". This step latches

the contents, on the Address Bus pins, A[8:0],

into the XRT 72L13 DS3 Framer Microproces-

sor Interface block. At this point, the "initial"

address of the burst access has now been

selected.

NOTE: The ALE_AS input pin should remain "low" for the

remainder of this "Burst Access" operation.

A.5

Next, the µC/µP should indicate that this cur-

rent bus cycle is a "Read" Operation by tog-

gling the RdB_DS (Read Strobe) input pin

"low". This action also enables the "bi-direc-

tional" data bus output drivers of the Framer

device. At this point, the bi-directional data bus

output drivers will proceed to drive the contents

of the "addressed" register onto the "bi-direc-

tional" data bus, D[7:0].

A.6

Immediately after the µC/µP toggles the "Read

Strobe" signal "low", the Framer device will tog-

gle the Rdy_Dtck (READY) output pin "low".

The Framer device does this in order to inform

the µC/µP that the data (to be read from the

data bus) is "NOT READY" to be latched into

the µC/µP.

A.7

After some settling time, the data on the "bi-

directional" data bus will stabilize and can be

read by the µC/µP. The XRT 72L13 DS3

Framer will indicate that this data is ready to be

read, by toggling the Rdy_Dtck (Ready) signal

"high".

A.8

After the µC/µP detects the Rdy_Dtck signal

(from the XRT 72L13 DS3 Framer IC), it can

then will terminate the "Read" cycle by toggling

the RdB_DS (Read Strobe) input pin "high".

Figure 38 presents an illustration of the behavior of

the Microprocessor Interface Signals, during the "ini-

tial" Read Operation, within a Burst I/O Cycle; for an

Intel-type µC/µP.

XRT72L13 Datasheet(PDF) 83 Page - Exar Corporation

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