XRT72L13 datasheet(96/370 Pages) EXAR

96 / 370 page

XRT72L13

MULTIPLEXER/FRAMER IC

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PRELIMINARY

REV. 1.0.6

Setting this bit-field to “1” configures the XRT72L13

LOS condition, based upon its own internal criteria.

NOTES:

1. The XRT72L13 M13 chip will declare an “LOS”

condition anytime the RLOS input pin is set “high”

independent of the setting of this bit-field.

2. For more information on the XRT72L13 M13 chip’s

“internal criteria” for “Loss of Signal” please see

Section _.

Bit 4 - RESET

This “Read/Write” bit-field permits the user to com-

mand the XRT72L13 M13 chip into a software reset

state. If the XRT72L13 M13 chip is commanded into

the “RESET” state, all of its internal register bits will

automatically be set to their default condition.

The user can configure the XRT72L13 to operate in

the “RESET” state by inducing a “0” to “1” transition in

this bit-field.

Bit 3 - Interrupt Enable RESET

This “Read/Write” bit-field permits the user to config-

ure the XRT72L13 M13 chip to automatically disable

all Interrupts that are activated.

Setting this bit-field to “0” configures the XRT72L13

M13 chip to NOT disable the Interrupt Enable Status”

of any interrupt following their activation.

Setting this bit-field to “1” configures the XRT72L13

M13 to disable the Interrupt Enable Status” of any in-

terrupt following their activation.

For more information on this feature, please see Sec-

tion _.

Bit 2 - Frame Format Select

This “Read/Write” bit-field permits the user to select

the Framing format that the XRT72L13 M13 device

will be operating in.

Setting this bit-field to “0” configures the XRT72L13

M13 device to operate in the C-Bit Parity Framing

Format.

Setting this bit-field to “1” configures the XRT72L13

M13 device to operate in the M13 Framing Format.

Bits 1 and 0 - TimRefSel[1:0] - Timing Reference

Select

These two “Read/Write” bit-fields permits the user to

select both a “Framing Reference” and a “Timing Ref-

erence” for the Transmit Section of the XRT72L13.

The following table relates the states of the two-fields

to the selected “Framing” and “Timing” references.

NOTE: For more information on Framing and Timing Refer-

ences, please see Section _.

2.3.2.3

I/O Control Register

Bit 7 - Disable TxLOC

To be provided in the next update.

Bit 6 - LOC (Loss of Clock) Indicator

To be provided in the next update.

Bit 5 - Disable RxLOC

To be provided in the next update.

Bit 4 - AMI/B3ZS* Line Code Select

This “Read/Write” bit-field pemits the user to config-

ure the XRT72L13 M13 device to transmit and re-

ceive data via the AMI (Alternate Mark Inversion) line

code or via the B3ZS (Bipolar 3 Zero Substitution)

line code.

Setting this bit-field to “0” configures the XRT72L13

M13 device to transmit and receive data (via the DS3

Framer block) via the B3ZS format. Setting this bit-

field to “1” configures the XRT72L13 M13 device to

transmit and receive data via the AMI line code.

Bit 3 - Single-Rail/Dual-Rail Select

This “Read/Write” bit-field permits the user to config-

ure the XRT72L13 M13 device to operate in the “Sin-

gle-Rail” or “Dual-Rail” format.

TIMREFSEL[1:0]

FRAMING

REFERENCE

TIMING REFERENCE

Asynchronous

RxLineClk Input

signal

TxFrameRef

RxLineClk Input

signal

Asynchronous

TxInClk Input

signal

Asynchronous

TxInClk Input

signal

I/O CONTROL REGISTER (ADDRESS = 0X01)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Disable

TxLOC

LOC

Disable

RxLOC

AMI/B3ZS*

Line Code

Single-Rail/

Dual-Rail*

TxClkInv

RxClkInv

Reframe

R/W

0100

000

XRT72L13 Datasheet(PDF) 96 Page - Exar Corporation

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