MSP430F449IPZ datasheet(42/85 Pages) TI

42 / 85 page

MSP430x43x, MSP430x44x

MIXED SIGNAL MICROCONTROLLER

SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

control registers ADC12CTL0 and ADC12CTL1 (continued)

ADC12TOVIE

01A0h, bit2

Conversion time overflow interrupt enable.

The timing overflow takes place and a timing overflow vector is generated if another start

of sample and conversion is requested while the current conversion or sequence of

conversions is still active. The timing overflow enable, if set, may request an interrupt.

ADC12OVIE

01A0h, bit3

Overflow interrupt enables the individual enable for the overflow-interrupt vector.

The overflow takes place if the next conversion result is written into ADC memory

ADC12MEMx but the previous result was not read. If an overflow vector is generated, the

overflow-interrupt enable flag ADC12OVIE and the general-interrupt enable GIE are set

and an interrupt service is requested.

ADC12ON

01A0h, bit4

Switch on the 12-bit ADC core. Make sure that the settling timing constraints are met if ADC

core is powered up.

0: Power consumption of the core is off. No conversion is started.

1: ADC core is supplied with power. If no A/D conversion is required, ADC12ON can be

reset to conserve power.

REFON

01A0h, bit5

Reference voltage on

0: The internal reference voltage is switched off. No power is consumed by the reference

voltage generator.

1: The internal reference voltage is switched on and consumes additional power. The

settling time of the reference voltage should be over before the first sample and

conversion is started.

2_5V

01A0h, bit6

Reference voltage level

0: The internal-reference voltage is 1.5 V if REFON = 1.

1: The internal-reference voltage is 2.5 V if REFON = 1.

MSC

01A0h, bit7

Multiple sample and conversion. Works only when the sample timer is selected to generate

the sample signal and to repeat single channel, sequence of channel, or when repeat

sequence of channel (CONSEQ

≠0) is selected.

0: Only one sample is taken.

1: If SHP is set and CONSEQ = {1, 2, or 3}, then the rising edge of the sample timer’s input

signal starts the repeat and/or the sequence of channel mode. Then the second and all

further conversions are immediately started after the current conversion is completed.

SHT0

01A0h, bit8–11

Sample-and-hold Time0

SHT1

01A0h, bit12–15

Sample-and-hold Time1

The sample time is a multiple of the ADC12CLK

× 4:

tsample = 4 × ADC12CLK × n

SHT0/1

12–15

128

192

256

The sampling time defined by SHT0 is used when ADC12MEM0 through ADC12MEM7

are used during conversion. The sampling time defined by SHT1 is used when

ADC12MEM8 through ADC12MEM15 are used during conversion.

MSP430F449IPZ Datasheet(PDF) 42 Page - Texas Instruments

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