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MSP430F449IPZ Datasheet(PDF) 18 Page - Texas Instruments

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Part # MSP430F449IPZ
Description  MIXED SIGNAL MICROCONTROLLER
PDF  85 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

MSP430F449IPZ Datasheet(HTML) 18 Page - Texas Instruments

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MSP430x43x, MSP430x44x
MIXED SIGNAL MICROCONTROLLER
SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
boot ROM containing bootstrap loader (continued)
unprotected functions
Mass erase, erase of the main memory (segment 0 to segment n)
Access to the MSP430 via the bootstrap loader is protected. It must be enabled before any protected function
can be performed. The 256 bits in 0FFE0h to 0FFFFh provide the access key.
protected functions
All protected functions can be executed only if the access is enabled.
D Write/program byte into flash memory. The parameters passed are start address and number of bytes (the
flash segment-write feature of the flash memory is not supported and not used with the UART protocol).
D Segment erase of segment 0 to segment n in main memory, and segment erase of segments A and B in
the information memory
D Reading of all data in main memory and information memory
D Reading and writing to all peripheral modules and RAM
D Modifying PC and start program execution immediately
NOTE:
Unauthorized readout of code and data is prevented by the user’s definition of the data in the
interrupt memory locations.
features of the bootstrap loader are:
D UART communication protocol, fixed to 9600 baud
D Port pin P1.0/TA0 for transmit, P1.1/TA0/MCLK for receive
D TI standard serial protocol definition
D Loader implemented in flash memory version only
D Program execution starts with the user vector at 0FFFEh or with the bootstrap loader (address 0C00h)
hardware resources used for serial input/output:
D Pins P1.0/TA0 and P1.1/TA0/MCLK for serial data transmission
D TCK and RST/NMI to start program execution at the reset or bootstrap loader vector
D FLL+ module: SCFI0=0, SCFI1=098h, SCG0=1
D Timer_A: Timer_A operates in continuous mode with SMCLK source selected, input divider set to 1, and
using CCR0 and polling CCIFG0.
D WDT: Watchdog Timer is halted
D Interrupt: GIE=0, NMIIE=0, OFIFG=0, ACCVIFG=0
D Using the stack depends on the start condition:
Starting via RST/NMI and TCK pin: 6 bytes used, stack pointer initialized to 220h
Start via SW (e.g., BR &0C02h): 6 bytes used, on top of the actual stack pointer
D RAM: 20 bytes used, start at address 0200h, last address used: 0219h
NOTE:
When writing RAM data via the bootstrap loader, make sure the stack is outside the range of data
to be written.
Program execution begins with the user’s reset vector at FFFEh (standard method) if TCK is held high while
RST/NMI goes from low to high.



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