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TMS320VC5416 Datasheet(PDF) 64 Page - Texas Instruments |
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TMS320VC5416 Datasheet(HTML) 64 Page - Texas Instruments |
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64 / 98 page ![]() www.ti.com 5.5.3 I/O Read TMS320VC5416 Fixed-Point Digital Signal Processor SPRS095O – MARCH 1999 – REVISED JANUARY 2005 Table 5-10 and Table 5-11 assume testing over recommended operating conditions, IOSTRB = 0, and H = 0.5tc(CO) (see Figure 5-8). Table 5-10. I/O Read Timing Requirements 5416-120 5416-160 UNIT MIN MAX ta(A)M1 Access time, read data access from address valid, first read access(1) 4H – 9 ns tsu(D)R Setup time, read data valid before CLKOUT low 7 ns th(D)R Hold time, read data valid after CLKOUT low 0 ns (1) Address, R/W, PS, DS, and IS timings are all included in timings referenced as address. Table 5-11. I/O Read Switching Characteristics 5416-120 5416-160 PARAMETER UNIT MIN MAX td(CLKL-A) Delay time, CLKOUT low to address valid(1) – 1 4 ns td(CLKL-IOSL) Delay time, CLKOUT low to IOSTRB low – 1 4 ns td(CLKL-IOSH) Delay time, CLKOUT low to IOSTRB high 0 4 ns (1) Address, R/W, PS, DS, and IS timings are all included in timings referenced as address. Electrical Specifications 64 |
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