TMS320VC5416 datasheet(24/98 Pages) TI

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TMS320VC5416

Fixed-Point Digital Signal Processor

SPRS095O – MARCH 1999 – REVISED JANUARY 2005

Table 3-3. Software Wait-State Register (SWWSR) Bit Fields

BIT

RESET

FUNCTION

VALUE

NO.

NAME

Extended program address control bit. XPA is used in conjunction with the program space fields

XPA

(bits 0 through 5) to select the address range for program space wait states.

I/O space. The field value (0-7) corresponds to the base number of wait states for I/O space accesses

14-12

I/O

111

within addresses 0000-FFFFh. The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for

the base number of wait states.

Upper data space. The field value (0-7) corresponds to the base number of wait states for external

11-9

Data

111

data space accesses within addresses 8000-FFFFh. The SWSM bit of the SWCR defines a

multiplication factor of 1 or 2 for the base number of wait states.

Lower data space. The field value (0-7) corresponds to the base number of wait states for external

8-6

Data

111

data space accesses within addresses 0000-7FFFh. The SWSM bit of the SWCR defines a

multiplication factor of 1 or 2 for the base number of wait states.

Upper program space. The field value (0-7) corresponds to the base number of wait states for external

program space accesses within the following addresses:

•

XPA = 0: xx8000 - xxFFFFh

5-3

Program

111

•

XPA = 1: 400000h - 7FFFFFh

The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.

Program space. The field value (0-7) corresponds to the base number of wait states for external

program space accesses within the following addresses:

•

XPA = 0: xx0000 - xx7FFFh

2-0

Program

111

•

XPA = 1: 000000 - 3FFFFFh.

The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.

The software wait-state multiplier bit of the software wait-state control register (SWCR) is used to extend

the base number of wait states selected by the SWWSR. The SWCR bit fields are shown in Figure 3-6

and described in Table 3-4.

Reserved

R/W-0

Reserved

SWSM

R/W-0

LEGEND: R = Read, W = Write, n = value present after reset

Figure 3-6. Software Wait-State Register (SWWSR) [Memory-Mapped Register (MMR) Address

0028h]

Table 3-4. Software Wait-State Control Register (SWCR) Bit Fields

RESET

FUNCTION

VALUE

NO.

NAME

15-1

Reserved

These bits are reserved and are unaffected by writes.

Software wait-state multiplier. Used to multiply the number of wait states defined in the SWWSR by a

factor of 1 or 2.

SWSM

•

SWSM = 0: wait-state base values are unchanged (multiplied by 1)

•

SWSM = 1: wait-state base values are multiplied by 2 for a maximum of 14 wait states

Functional Overview

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