TMS320VC5416 datasheet(25/98 Pages) TI

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3.6.2

Programmable Bank-Switching

TMS320VC5416

Fixed-Point Digital Signal Processor

SPRS095O – MARCH 1999 – REVISED JANUARY 2005

Programmable bank-switching logic allows the device to switch between external memory banks without

requiring external wait states for memories that need additional time to turn off. The bank-switching logic

automatically inserts one cycle when accesses cross a 32K-word memory-bank boundary inside program

or data space.

Bank-switching is defined by the bank-switching control register (BSCR), which is memory-mapped

ataddress 0029h. The bit fields of the BSCR are shown in Figure 3-7 and are described in Table 3-5.

CONSEC

DIVFCT

IACKOFF

Reserved

R/W-1

R/W-11

R/W-1

Reserved

HBH

Reserved

R/W-0

LEGEND: R = Read, W = Write, n = value present after reset

Figure 3-7. Bank-Switching Control Register BSCR)[MMR Address 0029h]

Table 3-5. Bank-Switching Control Register (BSCR) Fields

RESET

BIT

NAME

FUNCTION

VALUE

Consecutive bank-switching. Specifies the bank-switching mode.

•

CONSEC = 0: Bank-switching on 32K bank boundaries only. This bit is cleared if fast access is

CONSEC

desired for continuous memory reads (i.e., no starting and trailing cycles between read cycles).

(1)

•

CONSEC = 1: Consecutive bank switches on external memory reads. Each read cycle consists of

3 cycles: starting cycle, read cycle, and trailing cycle.

CLKOUT output divide factor. The CLKOUT output is driven by an on-chip source having a frequency

equal to 1/(DIVFCT+1) of the DSP clock.

•

DIVFCT = 00: CLKOUT is not divided.

14-13

DIVFCT

•

DIVFCT = 01: CLKOUT is divided by 2 from the DSP clock.

•

DIVFCT = 10: CLKOUT is divided by 3 from the DSP clock.

•

DIVFCT = 11: CLKOUT is divided by 4 from the DSP clock (default value following reset).

IACK signal output off. Controls the output of the IACK signal. IACKOFF is set to 1 at reset.

IACKOFF

•

IACKOFF = 0: The IACK signal output off function is disabled.

•

IACKOFF = 1: The IACK signal output off function is enabled.

11-3

Rsvd

Reserved

HPI bus holder. Controls the HPI bus holder. HBH is cleared to 0 at reset.

•

HBH = 0: The bus holder is disabled except when HPI16 = 1.

HBH

•

HBH = 1: The bus holder is enabled. When not driven, the HPI data bus, HD[7:0] is held in the

previous logic level.

Bus holder. Controls the bus holder. BH is cleared to 0 at reset.

•

BH = 0: The bus holder is disabled.

•

BH = 1: The bus holder is enabled. When not driven, the data bus, D[15:0] is held in the previous

logic level.

Rsvd

Reserved

(1)

For additional information, see Section 3.11 of this document.

Functional Overview

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