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TMS320VC5407 Datasheet(PDF) 90 Page - Texas Instruments |
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TMS320VC5407 Datasheet(HTML) 90 Page - Texas Instruments |
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90 / 110 page ![]() Electrical Specifications 90 November 2001 − Revised April 2004 SPRS007D 5.12 Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings Table 5−19 assumes testing over recommended operating conditions and H = 0.5tc(CO) (see Figure 5−18). Table 5−19. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Switching Characteristics PARAMETER MIN MAX UNIT td(CLKL-IAQL) Delay time, CLKOUT low to IAQ low − 1 4 ns td(CLKL-IAQH) Delay time, CLKOUT low to IAQ high − 1 4 ns td(A)IAQ Delay time, IAQ low to address valid 2 ns td(CLKL-IACKL) Delay time, CLKOUT low to IACK low − 1 4 ns td(CLKL-IACKH) Delay time, CLKOUT low to IACK high − 1 4 ns td(A)IACK Delay time, IACK low to address valid 2 ns th(A)IAQ Hold time, address valid after IAQ high − 2 ns th(A)IACK Hold time, address valid after IACK high − 2 ns tw(IAQL) Pulse duration, IAQ low 2H − 2 ns tw(IACKL) Pulse duration, IACK low 2H − 2 ns IACK IAQ A[22:0] CLKOUT td(A)IACK td(A)IAQ tw(IACKL) th(A)IACK td(CLKL−IACKL) tw(IAQL) th(A)IAQ td(CLKL−IAQL) td(CLKL−IACKH) td(CLKL−IAQH) Figure 5−18. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings |
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