TMS320VC5407 datasheet(28/110 Pages) TI

28 / 110 page

Functional Overview

November 2001 − Revised April 2004

SPRS007D

Hex

010000

Program

Page 1

XPC=1

On-Chip

ROM

Hex

Program

020000

Page 2

XPC=2

Hex

Program

030000

Hex

Program

External

040000

Hex

Program

7F0000

Page 3

XPC=3

Page 4

XPC=4

Page 127

XPC=7Fh

External

7F3FFF

7F4000

043FFF

033FFF

023FFF

013FFF

014000

024000

034000

044000

......

External

Reserved

(OVLY = 1)

External

(OVLY = 0)

Reserved

(OVLY = 1)

External

(OVLY = 0)

Reserved

(OVLY = 1)

External

(OVLY = 0)

Reserved

(OVLY = 1)

External

(OVLY = 0)

Reserved

(OVLY = 1)

External

(OVLY = 0)

017FFF

018000

027FFF

028000

037FFF

038000

047FFF

048000

7F7FFF

7F8000

01FFFF

02FFFF

03FFFF

04FFFF

7FFFFF

External†

03DFFF

03E000

Reserved

† The lower 16K words of pages 1 through 127 are only available when the OVLY bit is cleared to 0. If the OVLY bit is set to 1, the on-chip memory

is mapped to the lower 16K words of all program space pages.

Figure 3−5. 5404 Extended Program Memory Map

3.5.3 Relocatable Interrupt Vector Table

The reset, interrupt, and trap vectors are addressed in program space. These vectors are soft — meaning that

the processor, when taking the trap, loads the program counter (PC) with the trap address and executes the

code at the vector location. Four words, either two 1-word instructions or one 2-word instruction, are reserved

at each vector location to accommodate a delayed branch instruction which allows branching to the

appropriate interrupt service routine without the overhead.

At device reset, the reset, interrupt, and trap vectors are mapped to address FF80h in program space.

However, these vectors can be remapped to the beginning of any 128-word page in program space after

device reset. This is done by loading the interrupt vector pointer (IPTR) bits in the PMST register with the

appropriate 128-word page boundary address. After loading IPTR, any user interrupt or trap vector is mapped

to the new 128-word page.

NOTE: The hardware reset (RS) vector cannot be remapped because the hardware reset loads the IPTR

with 1s. Therefore, the reset vector is always fetched at location FF80h in program space.

TMS320VC5407 Datasheet(PDF) 28 Page - Texas Instruments

TMS320VC5407 Datasheet(HTML) 28 Page - Texas Instruments

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