LAN89218 datasheet(63/148 Pages) MICROCHIP

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DS60001255B-page 63

LAN89218

4.2.2

SCRAMBLING

Repeated data patterns (especially the IDLE code-group) can have power spectral densities with large narrow-band

peaks. Scrambling the data helps eliminate these peaks and spread the signal power more uniformly over the entire

channel bandwidth. This uniform spectral density is required by FCC regulations to prevent excessive EMI from being

radiated by the physical wiring.

The scrambler also performs the Parallel In Serial Out conversion (PISO) of the data.

4.2.3

NRZI AND MLT3 ENCODING

The scrambler block passes the 5-bit wide parallel data to the NRZI converter where it becomes a serial 125MHz

NRZI data stream. The NRZI is encoded to MLT-3. MLT3 is a tri-level code where a change in the logic level

represents a code bit “1” and the logic output remaining at the same level represents a code bit “0”.

4.2.4

100M TRANSMIT DRIVER

The MLT3 data is then passed to the analog transmitter, which launches the differential MLT-3 signal, on outputs TXP

and TXN, to the twisted pair media via a 1:1 ratio isolation transformer. The 10Base-T and 100Base-TX signals pass

through the same transformer so that common “magnetics” can be used for both. The transmitter drives into the

100

 impedance of the CAT-5 cable. Cable termination and impedance matching require external components.

4.2.5

100M PHASE LOCK LOOP (PLL)

The 100M PLL locks onto reference clock and generates the 125 MHz clock used to drive the 125 MHz logic and

the 100Base-Tx Transmitter.

FIGURE 4-2:

RECEIVE DATA PATH

125 Mbps Serial

MAC

A/D

Converter

MLT-3

Converter

NRZI

Converter

4B/5B

Decoder

Magnetics

CAT-5

RJ45

100M

PLL

Internal

MII 25 MHz by 4 bits

RX_CLK

25 MHz

by 5 bits

NRZI

MLT-3

6 bit Data

Descrambler

and SIPO

DSP: Timing

recovery, Equalizer

and BLW Correction

MLT-3

MII

25 MHz

by 4 bits

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