LAN89218 datasheet(86/148 Pages) MICROCHIP

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LAN89218

DS60001255B-page 86

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5.3.13

PMT_CTRL— POWER MANAGEMENT CONTROL REGISTER

This register controls the Power Management features. This register can be read while the LAN89218 is in a power

saving mode.

Offset:

84h

Size:

32 bits

Note:

The LAN89218 must always be read at least once after power-up, reset, or upon return from a power-sav-

ing state or write operations will not function.

Bits

Description

Type

Default

31:14

Reserved

13:12

Power Management Mode (PM_MODE)

. These bits set the LAN89218 into

the appropriate Power Management mode. Special care must be taken when

modifying these bits.

Encoding:

00b – D0 (normal operation)

01b – D1 (wake-up frame and magic packet detection are enabled)

10b – D2 (can perform energy detect)

11b – Reserved - Do not set in this mode

Note:

When the LAN89218 is in any of the reduced power modes, a write

of any data to the BYTE_TEST register will wake-up the device. DO

NOT PERFORM WRITES TO OTHER ADDRRESSES while the

READY bit in this register is cleared.

00b

Reserved

PHY Reset (PHY_RST)

. Writing a ‘1’ to this bit resets the PHY. The internal

logic automatically holds the PHY reset for a minimum of 100 µs. When the

PHY is released from reset, this bit is automatically cleared. All writes to this bit

are ignored while this bit is high.

Wake-On-Lan Enable (WOL_EN)

. When set, the PME signal (if enabled with

PME_EN) will be asserted in accordance with the PME_IND bit upon a WOL

event. When set, the PME_INT will also be asserted upon a WOL event,

regardless of the setting of the PME_EN bit.

R/W

Energy-Detect Enable (ED_EN)

. When set, the PME signal (if enabled with

PME_EN) will be asserted in accordance with the PME_IND bit upon an

Energy-Detect event. When set, the PME_INT will also be asserted upon an

Energy Detect event, regardless of the setting of the PME_EN bit.

R/W

Reserved

PME Buffer Type (PME_TYPE)

. When cleared, enables PME to function as an

open-drain buffer for use in a Wired-Or configuration. When set, the PME out-

put is a Push-Pull driver. When configured as an open-drain output the

PME_POL field is ignored, and the output is always active low.

R/W

NASR

5:4

WAKE-UP Status (WUPS)

. This field indicates the cause of a wake-up event

detection as follows

00b – No wake-up event detected

01b – Energy detected

10b – Wake-up frame or magic packet detected

11b – Indicates multiple events occurred

WUPS bits are cleared by writing a ‘1’ to the appropriate bit. The device must

return to the D0 state (READY bit set) before these bits can be cleared.

Note:

In order to clear this bit, it is required that all event sources be

cleared as well. The event sources are described in Figure 3-19.

R/WC

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