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259481A Marking, TPS259481AYWPR Datasheet(PDF) 41 Page - Texas Instruments |
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TPS259481AYWPR Datasheet(HTML) 41 Page - Texas Instruments |
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41 / 56 page ![]() TPS259480x IN OUT EN/UVLO VIN1 VOUT COUT OVLO SPLYGD VLOGIC TPS259480x IN OUT EN/UVLO VIN2 OVLO SPLYGD FLT FLT IN1 supply active IN2 supply active ILM dVdt GND ITIMER ILM dVdt GND ITIMER VLOGIC Figure 9-17. Priority Power MUXing With 2 × TPS259480x - Option 2 Another variation of the previous configuration ensures minimum quiescent current on the auxiliary channel while primary channel is active, but at the cost of additional N-FET to drive the EN/UVLO pin of auxiliary path device as shown in Figure 9-18. At the same time, it has a higher switchover delay from primary to auxiliary supply as compared to the previous configuration. TPS259480x IN OUT EN/UVLO VIN1 VOUT COUT OVLO SPLYGD VLOGIC TPS259480x IN OUT EN/UVLO VIN2 OVLO SPLYGD FLT FLT IN1 supply active IN2 supply active ILM dVdt GND ITIMER ILM dVdt GND ITIMER VLOGIC Figure 9-18. Priority Power MUXing With 2 × TPS259480x - Option 3 While switching from a higher supply rail to lower supply rail, the minimum bus voltage can be calculated using Equation 17. Here, the switchover time is equal to the time taken by the device to come out of reverse current blocking state (tSWRCB). VOUT,min (V) = min (VIN1, VIN2) ‐ VFWDTH (V) ‐ tSWRCB (µs) × ILOAD (A) COUT (µF) (17) While switching from a lower supply rail to higher supply rail, the minimum bus voltage can be calculated using Equation 18. Here, the switchover time (tSW) is the time taken by the device to turn on fully and start delivering www.ti.com TPS25948 SLVSGT9A – FEBRUARY 2023 – REVISED SEPTEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: TPS25948 |
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