259481A Marking, TPS259481AYWPR datasheet(6/56 Pages) TI

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7.3 Recommended Operating Conditions (continued)

over operating free-air temperature range (unless otherwise noted)

Parameter

MIN

MAX

UNIT

VSPLYGD

SPLYGD/SPLYGD pin voltage range

SPLYGD/SPLYGD

VITIMER

ITIMER pin capacitor voltage rating

ITIMER

RILM

ILM pin resistance

ILM

536

4834

ILOAD

Continuous switch current, TJ ≤ 125℃

IN to OUT or OUT

to IN

Junction temperature

–40

125

°C

(1)

For supply voltages below 5 V, it is okay to pull up the EN pin to IN directly. For supply voltages greater than 5 V, it is recommended

to use a resistor divider to step down the voltage.

(2)

In a PowerMUX scenario with unequal supplies, the dVdt capacitor rating for each device should be chosen based on the highest of

the 2 rails.

7.4 Electrical Characteristics

(Test conditions unless otherwise noted) –40°C ≤ TJ ≤ 125°C, VIN = 12 V, OUT = Open, VEN/UVLO = 2 V, VOVLO = 0 V, RILM

= 536 Ω , dVdT = Open, ITIMER = Open, SPLYGD/SPLYGD = Open, FLT = Open for TPS259480x, RCBCTRL = Open for

TPS259481x/2x. All voltages referenced to GND.

Test

Parameter

Description

MIN

TYP

MAX

UNITS

INPUT SUPPLY (IN)

VUVP(R),IN

IN supply undervoltage protection rising threshold

2.7

3.0

3.3

VUVP(F),IN

IN supply undervoltage protection falling threshold

2.2

2.4

2.65

IQ(ON,IN)

IN supply ON state quiescent current when powered from IN,

VEN > VUVLO(R)

439

640

µA

IQ(OFF,UVLO,IN)

IN supply OFF state current when powered from IN, VSD(F) <

VEN < VUVLO(R)

193

µA

IOUTLKG(ON)

OUT supply leakage current when powered from IN

432

640

µA

IOUTLKG(OFF)

OUT supply leakage current when powered from IN, UVLO

condition (VSD(F) < VEN < VUVLO(R))

µA

ISD(IN)

IN supply shutdown current when powered from IN, VEN <

VSD(F)

µA

VUVP(R),OUT

OUT supply undervoltage protection rising threshold

2.7

3.0

3.3

VUVP(F),OUT

OUT supply undervoltage protection falling threshold

2.2

2.4

2.65

OUTPUT SUPPLY (OUT)

IQ(ON,OUT)

OUT supply ON state quiescent current when powered from

OUT, VEN > VUVLO(R)

422

640

µA

IQ(OFF,UVLO,OU

OUT supply OFF state current when powered from

OUT, VSD(F) < VEN < VUVLO(R)

110

µA

ISD(OUT)

OUT supply shutdown current when powered from OUT, VEN

< VSD(F)

µA

ON RESISTANCE (IN - OUT)

RON

VIN = 12 V, IOUT = 3 A, TJ = 25℃

12.2

mΩ

3.5 ≤ VIN ≤ 23 V, IOUT = 3 A, –40℃ ≤ TJ ≤ 125℃

mΩ

ENABLE/UNDERVOLTAGE LOCKOUT (EN/UVLO)

VUVLO(R)

EN/UVLO pin rising threshold to turn FET ON

1.17

1.2

1.23

VUVLO(F)

UVLO pin falling threshold to turn FET OFF

1.07

1.1

1.12

VSD(F)

EN/UVLO falling threshold for lowest shutdown current

0.54

0.75

IENLKG

EN/UVLO pin leakage current

–0.1

0.1

µA

OVERVOLTAGE LOCKOUT (OVLO)

VOV(R)

OVLO pin rising threshold

1.18

1.2

1.23

TPS25948

SLVSGT9A – FEBRUARY 2023 – REVISED SEPTEMBER 2023

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