BLUENRG-2 datasheet(122/190 Pages) STMICROELECTRONICS

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Functional details

BlueNRG-2

122/190

DocID030675 Rev 2

Table 154: GPIO

– DATC register description: address offset GPIO_BASE_ADDR+0x40

Bit

Field

name

Reset

Description

31:0

DATC

0x00000000

Clear some bits of DATA when in GPIO mode without

affecting the others (1 bit per IO).



0: No effect



1: Clear at 0 the bit

Table 155: GPIO - MFTX register description: address offset GPIO_BASE_ADDR+0x44

Bit

Field name

Reset

Description

7:0

MFT1_TIMER_A

0x0

MFT1 timer A.



0x00: IO0



0x01: IO1



0x02: IO2



...



0x19: IO25

15:8

MFT1_TIMER_B

0x0

MFT1 timer B



0x00: IO0



0x01: IO1



0x02: IO2



...



0x19: IO25

23:16

MFT2_TIMER_A

0x0

MFT2 timer A



0x00: IO0



0x01: IO1



0x02: IO2



...



0x19: IO25

31:24

MFT2_TIMER_B

0x0

MFT2 timer B



0x00: IO0



0x01: IO1



0x02: IO2



...



0x19: IO25

3.13

MFT

3.13.1

MFT introduction

The BlueNRG-2 integrates two multi functions timers (MFT).

Main features are:



Two 16-bit programmable timer/counters.



Two 16-bit reload/capture registers that function either as reload registers or as

capture registers, depending on the mode of operation.



An 8-bit fully programmable clock prescaler.



Clock source selectors that allow each counter to operate in:

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